From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-m155101.qiye.163.com (mail-m155101.qiye.163.com [101.71.155.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E7581F584E; Tue, 18 Mar 2025 10:00:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=101.71.155.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742292033; cv=none; b=QTF+Q1tCkKOSADHQJXIukl9SmmUN2+fA6Bruhys3PsZ63+b78Nqeops+cPa5uvRRHm1XozEBZfF1tfryxoUl9qqM77cR42GD/BuquyFcsFd59OreWxwvxXc0cxsVnNeesPem9DQC1SPCQ8TKwtzFZjfxIy08jxw4c3/CS80RmN8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742292033; c=relaxed/simple; bh=OhcogFB2WIL7PFHpn8MOTfLlsUnkVMZ+5CqRb2TV2fE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MEhlbKPrX686HSbzLkc4RPfsQLJvIFMz3bIFgdKKh5V7wajyPL+RvOAf5sKO03H8zMoNCOv0Bmq2mMcYrEZAN6kyMJhcgjp9lEm9MGSSUGYgJr1Szk+d7DqdupOl4rExlkE9HbZazhjIyt6ZRyZs++3RfDsQsBDUuZ+q04Y7t5Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn; spf=pass smtp.mailfrom=jmu.edu.cn; arc=none smtp.client-ip=101.71.155.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=jmu.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=jmu.edu.cn Received: from amadeus-Vostro-3710.lan (unknown [116.25.94.202]) by smtp.qiye.163.com (Hmail) with ESMTP id eac37605; Tue, 18 Mar 2025 18:00:17 +0800 (GMT+08:00) From: Chukun Pan To: Yao Zi Cc: Rob Herring , Jonas Karlman , Heiko Stuebner , Conor Dooley , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chukun Pan Subject: [PATCH 1/3] arm64: dts: rockchip: Add missing uart3 interrupt for RK3528 Date: Tue, 18 Mar 2025 18:00:08 +0800 Message-Id: <20250318100010.2253408-2-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250318100010.2253408-1-amadeus@jmu.edu.cn> References: <20250318100010.2253408-1-amadeus@jmu.edu.cn> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlDHhhDVhlNH0pOT0ofHh9DHVYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlKSk1VSU5VQk9VSUtJWVdZFhoPEhUdFFlBWU9LSFVKS0hKTkxOVUpLS1VKQk tLWQY+ X-HM-Tid: 0a95a8b260a503a2kunmeac37605 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6ODI6ECo*VjJOOkseAggaGBAu PzEaCg1VSlVKTE9JSUJJS0pDSU5JVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUpK TVVJTlVCT1VJS0lZV1kIAVlBQkxDNwY+ The interrupt of uart3 node on rk3528 is missing, fix it. Fixes: 7983e6c379a9 ("arm64: dts: rockchip: Add base DT for rk3528 SoC") Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 26c3559d6a6d..7f1ffd6003f5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -404,9 +404,10 @@ uart2: serial@ffa00000 { uart3: serial@ffa08000 { compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart"; + reg = <0x0 0xffa08000 0x0 0x100>; clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; clock-names = "baudclk", "apb_pclk"; - reg = <0x0 0xffa08000 0x0 0x100>; + interrupts = ; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; -- 2.25.1