[PATCH net-next 00/13] Support the Cadence MACB/GEM instances on Mobileye EyeQ5 SoCs

["Théo Lebrun" <theo.lebrun@bootlin.com>]

Mobileye EyeQ5 SoCs provides two GEM IP blocks. The end result is
working networking on the EyeQ5 eval board. It isn't just a new
macb_config & compatible, here are each commit with a brief note:

 - Let's get the cleanup patches out of the way first:

   [PATCH net-next 04/13] net: macb: use BIT() macro for capability definitions
   [PATCH net-next 06/13] net: macb: simplify macb_probe() code touching match data
   [PATCH net-next 08/13] net: macb: introduce DMA descriptor helpers (is 64bit? is PTP?)
   [PATCH net-next 09/13] net: macb: sort #includes

 - LSO has been observed to be buggy, even though HW reports it is
   supported. We add a capability to force-disable it:

   [PATCH net-next 05/13] net: macb: add no LSO capability (MACB_CAPS_NO_LSO)

 - The MACB driver code has an issue: the HW inserts two dummy bytes at
   the start of Rx buffers, for IP header alignment (ie skb_reserve is
   done AFTER writing the addr in DMA descriptors). But the driver
   assumes that alignment is NET_IP_ALIGN. We appear to be facing the
   first SoC where that isn't the case.

   Happy to get comments & discuss the approach proposed.

   [PATCH net-next 07/13] net: macb: move HW IP alignment value to macb_config

 - We want cache coherent memory through a CM3 IO Coherency Unit (IOCU).
   To route through that, DMA addresses must have BIT(36) enabled.

   We do that in platform-specific code and hook our dma_map_ops through
   a notifier block.

   [PATCH net-next 11/13] MIPS: mobileye: add EyeQ5 DMA IOCU support

 - dt-bindings improvements:

   [PATCH net-next 02/13] dt-bindings: net: cdns,macb: allow tsu_clk without tx_clk
   [PATCH net-next 03/13] dt-bindings: net: cdns,macb: allow dma-coherent

 - Add the hardware to:
    - dt-bindings: new compatible, new phandle property,
    - the driver: macb_config, compatible and a custom init callback
      (that needs a regmap to the system-controller),
    - the DTS: both the SoC GEM instances and the eval board PHYs.

   [PATCH net-next 01/13] dt-bindings: net: cdns,macb: add Mobileye EyeQ5 ethernet interface
   [PATCH net-next 10/13] net: macb: Add "mobileye,eyeq5-gem" compatible
   [PATCH net-next 12/13] MIPS: mobileye: eyeq5: add two Cadence GEM Ethernet controllers
   [PATCH net-next 13/13] MIPS: mobileye: eyeq5-epm: add two Cadence GEM Ethernet PHYs

Have a nice day,
Théo

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
---
Théo Lebrun (13):
      dt-bindings: net: cdns,macb: add Mobileye EyeQ5 ethernet interface
      dt-bindings: net: cdns,macb: allow tsu_clk without tx_clk
      dt-bindings: net: cdns,macb: allow dma-coherent
      net: macb: use BIT() macro for capability definitions
      net: macb: add no LSO capability (MACB_CAPS_NO_LSO)
      net: macb: simplify macb_probe() code touching match data
      net: macb: move HW IP alignment value to macb_config
      net: macb: introduce DMA descriptor helpers (is 64bit? is PTP?)
      net: macb: sort #includes
      net: macb: Add "mobileye,eyeq5-gem" compatible
      MIPS: mobileye: add EyeQ5 DMA IOCU support
      MIPS: mobileye: eyeq5: add two Cadence GEM Ethernet controllers
      MIPS: mobileye: eyeq5-epm: add two Cadence GEM Ethernet PHYs

 .../devicetree/bindings/net/cdns,macb.yaml         |  25 +-
 MAINTAINERS                                        |   2 +-
 arch/mips/boot/dts/mobileye/eyeq5-epm5.dts         |  26 ++
 arch/mips/boot/dts/mobileye/eyeq5.dtsi             |  34 +++
 arch/mips/mobileye/Kconfig                         |   1 +
 arch/mips/mobileye/Makefile                        |   2 +
 arch/mips/mobileye/eyeq5-iocu-dma.c                | 160 +++++++++++
 drivers/net/ethernet/cadence/macb.h                |  51 ++--
 drivers/net/ethernet/cadence/macb_main.c           | 309 +++++++++++++--------
 9 files changed, 470 insertions(+), 140 deletions(-)
---
base-commit: ddf9c6d982ae7472a4da982e0497be2a140a194b
change-id: 20250311-macb-65a7fa86af1d

Best regards,
-- 
Théo Lebrun <theo.lebrun@bootlin.com>