Re: [PATCH RESEND 1/7] dt-bindings: soc: spacemit: define spacemit,k1-ccu resets

Rob Herring
2025-03-21T20:42:31Z

On Fri, Mar 21, 2025 at 10:18:24AM -0500, Alex Elder wrote:
> There are additional SpacemiT syscon CCUs whose registers control both
> clocks and resets: RCPU, RCPU2, and APBC2. Unlike those defined
> previously, these will initially support only resets. They do not
> incorporate power domain functionality.
>
> Define the index values for resets associated with all SpacemiT K1
> syscon nodes, including those with clocks already defined, as well as
> the new ones (without clocks).
>
> Signed-off-by: Alex Elder <elder@riscstar.com>
> ---
> .../soc/spacemit/spacemit,k1-syscon.yaml | 13 +-
> include/dt-bindings/clock/spacemit,k1-ccu.h | 134 ++++++++++++++++++
> 2 files changed, 143 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml
> index 07a6728e6f864..333c28e075b6c 100644
> --- a/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml
> +++ b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-syscon.yaml
> @@ -19,6 +19,9 @@ properties:
> - spacemit,k1-syscon-apbc
> - spacemit,k1-syscon-apmu
> - spacemit,k1-syscon-mpmu
> + - spacemit,k1-syscon-rcpu
> + - spacemit,k1-syscon-rcpu2
> + - spacemit,k1-syscon-apbc2
>
> reg:
> maxItems: 1
> @@ -57,13 +60,15 @@ allOf:
> properties:
> compatible:
> contains:
> - const: spacemit,k1-syscon-apbc
> + enum:
> + - spacemit,k1-syscon-apmu
> + - spacemit,k1-syscon-mpmu
> then:
> - properties:
> - "#power-domain-cells": false
> - else:
> required:
> - "#power-domain-cells"
> + else:
> + properties:
> + "#power-domain-cells": false
>
> additionalProperties: false
>
> diff --git a/include/dt-bindings/clock/spacemit,k1-ccu.h b/include/dt-bindings/clock/spacemit,k1-ccu.h
> index 4a0c7163257e3..a1e1b1fe714ce 100644
> --- a/include/dt-bindings/clock/spacemit,k1-ccu.h
> +++ b/include/dt-bindings/clock/spacemit,k1-ccu.h
> @@ -78,6 +78,9 @@
> #define CLK_APB 31
> #define CLK_WDT_BUS 32
>
> +/* MPMU resets */
> +#define RST_WDT 0
> +
> /* APBC clocks */
> #define CLK_UART0 0
> #define CLK_UART2 1
> @@ -109,6 +112,7 @@
> #define CLK_PWM17 27
> #define CLK_PWM18 28
> #define CLK_PWM19 29
> +

Stray change?

Otherwise,

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>