* [PATCH] PCI: xilinx-cpm: Add cpm5_csr register mapping for CPM5_HOST1 variant
@ 2025-03-17 12:41 Thippeswamy Havalige
2025-03-23 12:48 ` Krzysztof Wilczyński
2025-03-23 12:51 ` Krzysztof Wilczyński
0 siblings, 2 replies; 4+ messages in thread
From: Thippeswamy Havalige @ 2025-03-17 12:41 UTC (permalink / raw)
To: bhelgaas, lpieralisi, kw, manivannan.sadhasivam, robh, krzk+dt,
conor+dt
Cc: linux-pci, devicetree, linux-kernel, michal.simek,
bharat.kumar.gogada, Thippeswamy Havalige
This commit updates the CPM5 variant check to include CPM5_HOST1.
Previously, only CPM5 was considered when mapping the "cpm_csr" register.
With this change, CPM5_HOST1 is also supported, ensuring proper resource
mapping for this variant.
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
---
drivers/pci/controller/pcie-xilinx-cpm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pcie-xilinx-cpm.c b/drivers/pci/controller/pcie-xilinx-cpm.c
index d0ab187..13ca493 100644
--- a/drivers/pci/controller/pcie-xilinx-cpm.c
+++ b/drivers/pci/controller/pcie-xilinx-cpm.c
@@ -542,7 +542,8 @@ static int xilinx_cpm_pcie_parse_dt(struct xilinx_cpm_pcie *port,
if (IS_ERR(port->cfg))
return PTR_ERR(port->cfg);
- if (port->variant->version == CPM5) {
+ if (port->variant->version == CPM5 ||
+ port->variant->version == CPM5_HOST1) {
port->reg_base = devm_platform_ioremap_resource_byname(pdev,
"cpm_csr");
if (IS_ERR(port->reg_base))
--
1.8.3.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] PCI: xilinx-cpm: Add cpm5_csr register mapping for CPM5_HOST1 variant
2025-03-17 12:41 [PATCH] PCI: xilinx-cpm: Add cpm5_csr register mapping for CPM5_HOST1 variant Thippeswamy Havalige
@ 2025-03-23 12:48 ` Krzysztof Wilczyński
2025-03-23 12:51 ` Krzysztof Wilczyński
1 sibling, 0 replies; 4+ messages in thread
From: Krzysztof Wilczyński @ 2025-03-23 12:48 UTC (permalink / raw)
To: Thippeswamy Havalige
Cc: bhelgaas, lpieralisi, manivannan.sadhasivam, robh, krzk+dt,
conor+dt, linux-pci, devicetree, linux-kernel, michal.simek,
bharat.kumar.gogada
Hello,
> This commit updates the CPM5 variant check to include CPM5_HOST1.
> Previously, only CPM5 was considered when mapping the "cpm_csr" register.
>
> With this change, CPM5_HOST1 is also supported, ensuring proper resource
> mapping for this variant.
Applied to controller/xilinx-cpm, thank you!
Krzysztof
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] PCI: xilinx-cpm: Add cpm5_csr register mapping for CPM5_HOST1 variant
2025-03-17 12:41 [PATCH] PCI: xilinx-cpm: Add cpm5_csr register mapping for CPM5_HOST1 variant Thippeswamy Havalige
2025-03-23 12:48 ` Krzysztof Wilczyński
@ 2025-03-23 12:51 ` Krzysztof Wilczyński
2025-03-24 4:39 ` Havalige, Thippeswamy
1 sibling, 1 reply; 4+ messages in thread
From: Krzysztof Wilczyński @ 2025-03-23 12:51 UTC (permalink / raw)
To: Thippeswamy Havalige
Cc: bhelgaas, lpieralisi, manivannan.sadhasivam, robh, krzk+dt,
conor+dt, linux-pci, devicetree, linux-kernel, michal.simek,
bharat.kumar.gogada
Hello,
> This commit updates the CPM5 variant check to include CPM5_HOST1.
> Previously, only CPM5 was considered when mapping the "cpm_csr" register.
The subject says "cpm5_csr" but here we say "cpm_csr", I think it's only
the latter? Let me know, so I can update the branch correctly. Maybe both
things are correct. I am just double-checking.
Thank you!
Krzysztof
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH] PCI: xilinx-cpm: Add cpm5_csr register mapping for CPM5_HOST1 variant
2025-03-23 12:51 ` Krzysztof Wilczyński
@ 2025-03-24 4:39 ` Havalige, Thippeswamy
0 siblings, 0 replies; 4+ messages in thread
From: Havalige, Thippeswamy @ 2025-03-24 4:39 UTC (permalink / raw)
To: Krzysztof Wilczyński
Cc: bhelgaas@google.com, lpieralisi@kernel.org,
manivannan.sadhasivam@linaro.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Simek, Michal, Gogada, Bharat Kumar
[AMD Official Use Only - AMD Internal Distribution Only]
HI Krzysztof
> -----Original Message-----
> From: Krzysztof Wilczyński <kw@linux.com>
> Sent: Sunday, March 23, 2025 6:21 PM
> To: Havalige, Thippeswamy <thippeswamy.havalige@amd.com>
> Cc: bhelgaas@google.com; lpieralisi@kernel.org;
> manivannan.sadhasivam@linaro.org; robh@kernel.org; krzk+dt@kernel.org;
> conor+dt@kernel.org; linux-pci@vger.kernel.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; Simek, Michal <michal.simek@amd.com>;
> Gogada, Bharat Kumar <bharat.kumar.gogada@amd.com>
> Subject: Re: [PATCH] PCI: xilinx-cpm: Add cpm5_csr register mapping for
> CPM5_HOST1 variant
>
> Hello,
>
> > This commit updates the CPM5 variant check to include CPM5_HOST1.
> > Previously, only CPM5 was considered when mapping the "cpm_csr"
> register.
>
> The subject says "cpm5_csr" but here we say "cpm_csr", I think it's only
> the latter? Let me know, so I can update the branch correctly. Maybe both
> things are correct. I am just double-checking.
Yes, You're correct, cpm_csr is correct one and not cpm5_csr.
Thank you for correcting.
Regards,
Thippeswamy H
>
> Thank you!
>
> Krzysztof
^ permalink raw reply [flat|nested] 4+ messages in thread
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2025-03-17 12:41 [PATCH] PCI: xilinx-cpm: Add cpm5_csr register mapping for CPM5_HOST1 variant Thippeswamy Havalige
2025-03-23 12:48 ` Krzysztof Wilczyński
2025-03-23 12:51 ` Krzysztof Wilczyński
2025-03-24 4:39 ` Havalige, Thippeswamy
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