From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E8D1AEC4; Wed, 26 Mar 2025 06:30:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742970658; cv=none; b=SFcyWdQj6DHgSC67tL6U3EDz8Qd5TzO/v2HAnFCz5kL7iMW2Yt/w1TzY3rXuMVN75cMRxhphZ90mzwvVMteow5eqCLACbeKfC5lLAGrSkkn7qWIYCE5Okry+n+dgiTBvmH7H/0SjbSI44yK3Pp4xdq8hoWhCSYdcJalISw4LwwU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1742970658; c=relaxed/simple; bh=NS5BOoNfVSDakVttI7Qvnjns6VTDEvEvJEzGUfFhAJw=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=RCa8Hi5+bWZxPpxIISU2eOT6XnANg9yGr2H3qtMWFGt6BgPHVlegPcqQCTYUhiSQjwWRWGsdXVpCrluN2Yz2ABq0PLPdtC3ksfzsDAqwD2hFyLHUrdIYHmP9pwJttw5HmzsPcgVJrJShAbjagdwyaAlih+hW4kShMyhZFIAFLxg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=KIbrKgF4; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="KIbrKgF4" X-UUID: db9aef380a0b11f08eb9c36241bbb6fb-20250326 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=aaBZuoENevLJbWKLyrTtql09PLoMSh8b42u2wmaoENc=; b=KIbrKgF4iS2LkoziQeVaFG6aUh/D5H63p94/ruXthD3SXlO/ataD9j2zCq9iXI2e6NTZR0MpfEEVDvOq9lxM5TkOHIrw2N78Qngq87l8xDoedx/5P9CDa7ADfKkVczBJE+M06F6ilpZ/Rkbj1YBLLArukxJLs8tDl6B9KgUq+sM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.2.1,REQID:2ffd698b-fc44-48a0-813c-14c44710edf2,IP:0,UR L:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-25 X-CID-META: VersionHash:0ef645f,CLOUDID:0055cfc6-16da-468a-87f7-8ca8d6b3b9f7,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0|50,EDM:-3,IP:ni l,URL:1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES :1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULS X-UUID: db9aef380a0b11f08eb9c36241bbb6fb-20250326 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1009903654; Wed, 26 Mar 2025 14:30:49 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Wed, 26 Mar 2025 14:30:47 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Wed, 26 Mar 2025 14:30:47 +0800 From: Crystal Guo To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Crystal Guo CC: , , , , Subject: [v3,0/2] Add an interface to get current DDR data rate Date: Wed, 26 Mar 2025 14:30:30 +0800 Message-ID: <20250326063041.7126-1-crystal.guo@mediatek.com> X-Mailer: git-send-email 2.46.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N This series is based on linux-next, tag: next-20250324. Vcore DVFS feature need know the current DDR data rate. Add MediaTek DRAMC driver to provide an interface that can obtain current DDR data rate. --- Changes in v3: - Move register offset, register mask and other SoC-dependent variables to the platform data; - Correct the spelling error. --- Changes in v2: - Remove pr_info and pr_err, use dev_err or dev_err_probe to print error message; - Replace module_init by module_platform_driver; - Remove unnecessary global variables; - Change fmeter-verison to platform data; - Remove mtk-dramc.h; - Refine compatible to "mediatek,mt8196-dramc"; - Refine CONFIG name to MEDIATEK_MC; - Fix yaml build errors, remove unnecessary properties on yaml file. Link to v2: https://patchwork.kernel.org/patch/13964208 Crystal Guo (2): dt-bindings: memory-controllers: Add MediaTek DRAM controller interface memory/mediatek: Add an interface to get current DDR data rate .../memory-controllers/mediatek,dramc.yaml | 44 ++++ drivers/memory/Kconfig | 1 + drivers/memory/Makefile | 1 + drivers/memory/mediatek/Kconfig | 21 ++ drivers/memory/mediatek/Makefile | 2 + drivers/memory/mediatek/mtk-dramc.c | 232 ++++++++++++++++++ 6 files changed, 301 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/mediatek,dramc.yaml create mode 100644 drivers/memory/mediatek/Kconfig create mode 100644 drivers/memory/mediatek/Makefile create mode 100644 drivers/memory/mediatek/mtk-dramc.c -- 2.18.0