From: Frank Li <Frank.Li@nxp.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>
Cc: devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, hongxing.zhu@nxp.com,
Frank Li <Frank.Li@nxp.com>
Subject: [PATCH 8/8] arm64: dts: imx8mq-evk: add pcie[0,1]-ep nodes
Date: Mon, 31 Mar 2025 15:02:46 -0400 [thread overview]
Message-ID: <20250331-imx8_pcie_ep_dts-v1-8-270ef0868ac9@nxp.com> (raw)
In-Reply-To: <20250331-imx8_pcie_ep_dts-v1-0-270ef0868ac9@nxp.com>
Add pcie[0,1]-ep nodes and apply imx-pcie1-ep overlay file.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/Makefile | 3 +++
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 20 ++++++++++++++++++++
2 files changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 4f2f50203dd86..205552b4e4985 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -260,6 +260,9 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl-lvds.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb
+imx8mq-evk-pcie1-ep-dtbs += imx8mq-evk.dtb imx-pcie1-ep.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-pcie1-ep.dtb
+
dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-kontron-pitx-imx8m.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index a87d0692c3bb3..43e45b0bd0d17 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -377,6 +377,16 @@ &pcie0 {
status = "okay";
};
+&pcie0_ep {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie0>;
+ clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
+ <&pcie0_refclk>,
+ <&clk IMX8MQ_CLK_PCIE1_PHY>,
+ <&clk IMX8MQ_CLK_PCIE1_AUX>;
+ status = "disabled";
+};
+
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie1>;
@@ -390,6 +400,16 @@ &pcie1 {
status = "okay";
};
+&pcie1_ep {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie1>;
+ clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
+ <&pcie0_refclk>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&clk IMX8MQ_CLK_PCIE2_AUX>;
+ status = "disabled";
+};
+
&pgc_gpu {
power-supply = <&sw1a_reg>;
};
--
2.34.1
next prev parent reply other threads:[~2025-03-31 19:03 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-31 19:02 [PATCH 0/8] arm64: dts: imx8: create common imx-pcie[0,1]-ep overlay file Frank Li
2025-03-31 19:02 ` [PATCH 1/8] arm64: dts: imx8: create unified pcie0 and pcie0_ep label for all chips Frank Li
2025-03-31 19:02 ` [PATCH 2/8] arm64: dts: imx8dxl-ss-hsio: correct irq number for imx8dxl Frank Li
2025-03-31 19:02 ` [PATCH 3/8] arm64: dts: imx8dxl-evk: Add pcie0-ep node and use unified pcie0 label Frank Li
2025-03-31 19:02 ` [PATCH 4/8] arm64: dts: imx8: use common imx-pcie0-ep.dtso to enable PCI ep function Frank Li
2025-03-31 19:02 ` [PATCH 5/8] arm64: dts: imx95: add pcie1 ep overlay file and create pcie-ep dtb files Frank Li
2025-03-31 19:02 ` [PATCH 6/8] arm64: dts: imx8mm-evk: add pcie0-ep node and apply pcie0-ep overlay file Frank Li
2025-03-31 19:02 ` [PATCH 7/8] arm64: dts: imx8mq: add pcie0-ep node Frank Li
2025-03-31 19:02 ` Frank Li [this message]
2025-04-23 9:23 ` [PATCH 0/8] arm64: dts: imx8: create common imx-pcie[0,1]-ep overlay file Shawn Guo
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