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smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=phXjCmqz; arc=none smtp.client-ip=217.70.183.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="phXjCmqz" Received: by mail.gandi.net (Postfix) with ESMTPSA id 7FA204340C; Fri, 4 Apr 2025 08:53:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1743756804; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=SZTRJDBNNgYDkCBY6upcyYXVnBhkGlf/cu+m+M/6vIQ=; b=phXjCmqzZZKxxuJwruXaetuuVy5P0E2DyGB/9ihDxzLCq+CQn5d1CAbwfZaZ+Fmg9BRjus 7Q5NWpzcI5e6Iwg39kYruOE98vGmVxUWb92md2uia83KBMDgVaDpZD9qfsncjO9bloHYL0 5LW158MhgkQiGj/JRR4z4HNiKF/TIGimyBmXrN32dWWPehyS1tRmaxMY/ADDmnMiJ2JMXK +jXcXkkKQxqOLY710F/sL0n/tx69yrVl2R2/wb7aZ+nBlIIbwoOt1WeP41torkK7+dYjWX yZhckxdHE9b9jL60QvNPVyUM1Vvk86wzB9MlfLJgNsMswfGXXzhKQMTmz9R48g== Date: Fri, 4 Apr 2025 10:53:22 +0200 From: Alexandre Belloni To: Ciprian Marian Costea Cc: Krzysztof Kozlowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP S32 Linux , imx@lists.linux.dev, Christophe Lizzi , Alberto Ruiz , Enric Balletbo , Eric Chanudet Subject: Re: [PATCH v9 3/4] arm64: defconfig: add S32G RTC module support Message-ID: <2025040408532288b38dea@mail.local> References: <20250403103346.3064895-1-ciprianmarian.costea@oss.nxp.com> <20250403103346.3064895-4-ciprianmarian.costea@oss.nxp.com> <6ebb8c15-9ff1-4bf3-bbf3-c91aa387d873@oss.nxp.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdduledutdduucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuifetpfffkfdpucggtfgfnhhsuhgsshgtrhhisggvnecuuegrihhlohhuthemuceftddunecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenucfjughrpeffhffvvefukfhfgggtuggjsehttdertddttddvnecuhfhrohhmpeetlhgvgigrnhgurhgvuceuvghllhhonhhiuceorghlvgigrghnughrvgdrsggvlhhlohhnihessghoohhtlhhinhdrtghomheqnecuggftrfgrthhtvghrnhepgeeiudeuteehhfekgeejveefhfeiudejuefhgfeljefgjeegkeeujeeugfehgefgnecuffhomhgrihhnpegsohhothhlihhnrdgtohhmnecukfhppedvrgdtudemtggsudegmeehheeimeejrgdttdemugekjegvmedusgdusgemledtkeegmegttghftgenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepihhnvghtpedvrgdtudemtggsudegmeehheeimeejrgdttdemugekjegvmedusgdusgemledtkeegmegttghftgdphhgvlhhopehlohgtrghlhhhoshhtpdhmrghilhhfrhhomheprghlvgigrghnughrvgdrsggvlhhlohhnihessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepudejpdhrtghpthhtoheptghiphhrihgrnhhmrghrihgrnhdrtghoshhtvggrsehoshhsrdhngihprdgtohhmpdhrtghpthhtohepkhhriihksehkvghrnhgvlhdrohhrghdprhgtphhtt hhopehrohgshheskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepkhhriihkodgutheskhgvrhhnvghlrdhorhhgpdhrtghpthhtoheptghonhhorhdoughtsehkvghrnhgvlhdrohhrghdprhgtphhtthhopegtrghtrghlihhnrdhmrghrihhnrghssegrrhhmrdgtohhmpdhrtghpthhtohepfihilhhlsehkvghrnhgvlhdrohhrghdprhgtphhtthhopehlihhnuhigqdhrthgtsehvghgvrhdrkhgvrhhnvghlrdhorhhg X-GND-Sasl: alexandre.belloni@bootlin.com On 04/04/2025 10:19:56+0300, Ciprian Marian Costea wrote: > On 4/4/2025 10:15 AM, Krzysztof Kozlowski wrote: > > On 04/04/2025 08:24, Ciprian Marian Costea wrote: > > > On 4/4/2025 9:17 AM, Krzysztof Kozlowski wrote: > > > > On 03/04/2025 12:33, Ciprian Costea wrote: > > > > > From: Ciprian Marian Costea > > > > > > > > > > The RTC hardware module present on S32G based SoCs tracks clock time > > > > > during system suspend and it is used as a wakeup source on S32G2/S32G3 > > > > > architecture. > > > > Which boards are using it? I don't see any DTS (nowhere), so I do not > > > > see single reason for this patch. > > > > > > > > Best regards, > > > > Krzysztof > > > > > > The RTC module is used by all the currently supported S32G2/S32G3 > > > boards, so currently they are: S32G274A-EVB, S32G274A-RDB2, S32G399A-RDB3. > > > > I don't think so. I looked at these DTS and there is no RTC. > > > > > I do see your point in the fact that this driver should be enabled as > > > module only after platforms are actually using it. > > > > No, post the user. I don't see the point of sending defconfig patch with > > RTC patchset anyway. That's different subsystem. > > > > > > > > So, would it be better for me to send a V10 in this series with the DTS > > > patch added ? > > > > No, separate patchsets. > > Ok. I will send out a V10 in which I will drop this current patch from the > patchset. Also, I will send the DTS patch which adds S32G274A-EVB, > S32G274-RDB2 and S32G399A-RDB3 usage of the RTC after this patchset gets > accepted. > I don't need V10, I can apply V9 without 3/4 and 4/4 > Best Regards, > Ciprian > > > > > Best regards, > > Krzysztof > -- Alexandre Belloni, co-owner and COO, Bootlin Embedded Linux and Kernel engineering https://bootlin.com