[net-next PATCH v2 00/14] Add PCS core support

[net-next PATCH v2 00/14] Add PCS core support

[Sean Anderson]

This series adds support for creating PCSs as devices on a bus with a
driver (patch 3). As initial users,

- The Lynx PCS (and all of its users) is converted to this system (patch 5)
- The Xilinx PCS is broken out from the AXI Ethernet driver (patches 6-8)
- The Cadence MACB driver is converted to support external PCSs (namely
  the Xilinx PCS) (patches 9-10).

The last few patches add device links for pcs-handle to improve boot times,
and add compatibles for all Lynx PCSs.

This series depends on [1,2], and they have been included at the
beginning so CI will run. However, I expect them to be reviewed/applied
outside the net-next tree.

Care has been taken to ensure backwards-compatibility. The main source
of this is that many PCS devices lack compatibles and get detected as
PHYs. To address this, pcs_get_by_fwnode_compat allows drivers to edit
the devicetree to add appropriate compatibles.

There is another series [3] with the same goal by Christian Marangi. In
comparison, I believe this series

- Implements a simpler and more-robust method of PCS access.
- Provides a more-direct upgrade path for existing MAC and PCS drivers.

Due to popular demand, I have added support for #pcs-cells with this
revision.

[1] https://lore.kernel.org/all/20250407222134.2280553-1-sean.anderson@linux.dev/
[2] https://lore.kernel.org/all/20250407223714.2287202-1-sean.anderson@linux.dev/
[3] https://lore.kernel.org/netdev/20250406221423.9723-1-ansuelsmth@gmail.com/

Changes in v2:
- Add fallbacks for pcs_get* and pcs_put
- Add support for #pcs-cells
- Change base compatible to just xlnx,pcs
- Change compatible to just xlnx,pcs
- Defer devicetree updates for another series
- Drop #clock-cells description
- Drop PCS_ALTERA_TSE which was accidentally added while rebasing
- Move #clock-cells after compatible
- Move update to macb_pcs_get_state to previous patch
- Remove outdated comment
- Remove second example
- Remove unused variable
- Remove unused variable lynx_properties
- Rename pcs-modes to xlnx,pcs-modes
- Reorder pcs_handle to come before suffix props
- Reword commit message
- Rework xilinx_pcs_validate to just clear out half-duplex modes instead
  of constraining modes based on the interface.

Sean Anderson (13):
  dt-bindings: net: Add Xilinx PCS
  device property: Add optional nargs_prop for get_reference_args
  device property: Add fwnode_property_get_reference_optional_args
  scripts: kernel-doc: fix parsing function-like typedefs (again)
  net: phylink: Support setting PCS link change callbacks
  net: pcs: Add subsystem
  net: pcs: lynx: Convert to an MDIO driver
  net: phy: Export some functions
  net: pcs: Add Xilinx PCS driver
  net: axienet: Convert to use PCS subsystem
  net: macb: Move most of mac_config to mac_prepare
  net: macb: Support external PCSs
  of: property: Add device link support for PCS

Vladimir Oltean (1):
  net: dsa: ocelot: suppress PHY device scanning on the internal MDIO
    bus

 .../devicetree/bindings/net/xilinx,pcs.yaml   | 115 +++
 Documentation/networking/index.rst            |   1 +
 Documentation/networking/kapi.rst             |   4 +
 Documentation/networking/pcs.rst              | 107 +++
 MAINTAINERS                                   |   8 +
 drivers/base/property.c                       |  50 +-
 drivers/base/swnode.c                         |  13 +-
 drivers/net/dsa/ocelot/Kconfig                |   4 +
 drivers/net/dsa/ocelot/felix_vsc9959.c        |  15 +-
 drivers/net/dsa/ocelot/seville_vsc9953.c      |  16 +-
 drivers/net/ethernet/altera/Kconfig           |   2 +
 drivers/net/ethernet/altera/altera_tse_main.c |   7 +-
 drivers/net/ethernet/cadence/macb.h           |   1 +
 drivers/net/ethernet/cadence/macb_main.c      | 229 +++--
 drivers/net/ethernet/freescale/dpaa/Kconfig   |   2 +-
 drivers/net/ethernet/freescale/dpaa2/Kconfig  |   3 +
 .../net/ethernet/freescale/dpaa2/dpaa2-mac.c  |  11 +-
 drivers/net/ethernet/freescale/enetc/Kconfig  |   2 +
 .../net/ethernet/freescale/enetc/enetc_pf.c   |   8 +-
 .../net/ethernet/freescale/enetc/enetc_pf.h   |   1 -
 .../freescale/enetc/enetc_pf_common.c         |   4 +-
 drivers/net/ethernet/freescale/fman/Kconfig   |   4 +-
 .../net/ethernet/freescale/fman/fman_memac.c  |  27 +-
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |   3 +
 .../ethernet/stmicro/stmmac/dwmac-socfpga.c   |   6 +-
 drivers/net/ethernet/xilinx/Kconfig           |   1 +
 drivers/net/ethernet/xilinx/xilinx_axienet.h  |   4 +-
 .../net/ethernet/xilinx/xilinx_axienet_main.c | 104 +--
 drivers/net/pcs/Kconfig                       |  45 +-
 drivers/net/pcs/Makefile                      |   4 +
 drivers/net/pcs/core.c                        | 782 ++++++++++++++++++
 drivers/net/pcs/pcs-lynx.c                    | 110 +--
 drivers/net/pcs/pcs-xilinx.c                  | 479 +++++++++++
 drivers/net/phy/mdio_device.c                 |   1 +
 drivers/net/phy/phy_device.c                  |   3 +-
 drivers/net/phy/phylink.c                     |  24 +-
 drivers/of/property.c                         |  12 +-
 include/linux/fwnode.h                        |   2 +-
 include/linux/pcs-lynx.h                      |  13 +-
 include/linux/pcs-xilinx.h                    |  36 +
 include/linux/pcs.h                           | 195 +++++
 include/linux/phy.h                           |   1 +
 include/linux/phylink.h                       |  27 +-
 include/linux/property.h                      |   4 +
 scripts/kernel-doc                            |   2 +-
 45 files changed, 2181 insertions(+), 311 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/xilinx,pcs.yaml
 create mode 100644 Documentation/networking/pcs.rst
 create mode 100644 drivers/net/pcs/core.c
 create mode 100644 drivers/net/pcs/pcs-xilinx.c
 create mode 100644 include/linux/pcs-xilinx.h
 create mode 100644 include/linux/pcs.h

-- 
2.35.1.1320.gc452695387.dirty

[net-next PATCH v2 01/14] dt-bindings: net: Add Xilinx PCS

[Sean Anderson]

Add a binding for the Xilinx 1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE
IP. This device is a soft device typically used to adapt between GMII
and SGMII or 1000BASE-X (possbilty in combination with a serdes).
pcs-modes reflects the modes available with the as configured when the
device is synthesized. Multiple modes may be specified if dynamic
reconfiguration is supported.

One PCS may contain "shared logic in core" which can be connected to
other PCSs with "shared logic in example design." This primarily refers
to clocking resources, allowing a reference clock to be shared by a bank
of PCSs. To support this, if #clock-cells is defined then the PCS will
register itself as a clock provider for other PCSs.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---

Changes in v2:
- Change base compatible to just xlnx,pcs
- Drop #clock-cells description
- Move #clock-cells after compatible
- Remove second example
- Rename pcs-modes to xlnx,pcs-modes
- Reword commit message

 .../devicetree/bindings/net/xilinx,pcs.yaml   | 115 ++++++++++++++++++
 1 file changed, 115 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/xilinx,pcs.yaml

diff --git a/Documentation/devicetree/bindings/net/xilinx,pcs.yaml b/Documentation/devicetree/bindings/net/xilinx,pcs.yaml
new file mode 100644
index 000000000000..f9ec032127cf
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/xilinx,pcs.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/xilinx,pcs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx 1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP
+
+maintainers:
+  - Sean Anderson <sean.anderson@seco.com>
+
+description:
+  This is a soft device which implements the PCS and (depending on
+  configuration) PMA layers of an IEEE Ethernet PHY. On the MAC side, it
+  implements GMII. It may have an attached SERDES (internal or external), or
+  may directly use LVDS IO resources. Depending on the configuration, it may
+  implement 1000BASE-X, SGMII, 2500BASE-X, or 2.5G SGMII.
+
+  This device has a notion of "shared logic" such as reset and clocking
+  resources which must be shared between multiple PCSs using the same I/O
+  banks. Each PCS can be configured to have the shared logic in the "core"
+  (instantiated internally and made available to other PCSs) or in the "example
+  design" (provided by another PCS). PCSs with shared logic in the core are
+  reset controllers, and generally provide several resets for other PCSs in the
+  same bank.
+
+properties:
+  compatible:
+    items:
+      - const: xlnx,pcs-16.2
+      - const: xlnx,pcs
+
+  reg:
+    maxItems: 1
+
+  "#clock-cells":
+    const: 0
+
+  clocks:
+    items:
+      - description:
+          The reference clock for the PCS. Depending on your setup, this may be
+          the gtrefclk, refclk, clk125m signal, or clocks from another PCS.
+
+  clock-names:
+    const: refclk
+
+  done-gpios:
+    maxItems: 1
+    description:
+      GPIO connected to the reset-done output, if present.
+
+  interrupts:
+    items:
+      - description:
+          The an_interrupt autonegotiation-complete interrupt.
+
+  interrupt-names:
+    const: an
+
+  xlnx,pcs-modes:
+    description:
+      The interfaces that the PCS supports. Multiple interfaces may be
+      specified if dynamic reconfiguration is enabled.
+    oneOf:
+      - const: sgmii
+      - const: 1000base-x
+      - const: 2500base-x
+      - items:
+          - const: sgmii
+          - const: 1000base-x
+
+  reset-gpios:
+    maxItems: 1
+    description:
+      GPIO connected to the reset input.
+
+required:
+  - compatible
+  - reg
+  - xlnx,pcs-modes
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    mdio {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        pcs0: ethernet-pcs@0 {
+            compatible = "xlnx,pcs-16.2", "xlnx,pcs";
+            reg = <0>;
+            #clock-cells = <0>;
+            clocks = <&si570>;
+            clock-names = "refclk";
+            interrupts-extended = <&gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+            interrupt-names = "an";
+            reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
+            done-gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
+            xlnx,pcs-modes = "sgmii", "1000base-x";
+        };
+
+        pcs1: ethernet-pcs@1 {
+            compatible = "xlnx,pcs-16.2", "xlnx,pcs";
+            reg = <1>;
+            xlnx,pcs-modes = "sgmii";
+            clocks = <&pcs0>;
+            clock-names = "refclk";
+        };
+    };
-- 
2.35.1.1320.gc452695387.dirty

Re: [net-next PATCH v2 01/14] dt-bindings: net: Add Xilinx PCS

[Rob Herring]

On Mon, Apr 07, 2025 at 07:17:32PM -0400, Sean Anderson wrote:
> Add a binding for the Xilinx 1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE
> IP. This device is a soft device typically used to adapt between GMII
> and SGMII or 1000BASE-X (possbilty in combination with a serdes).
> pcs-modes reflects the modes available with the as configured when the
> device is synthesized. Multiple modes may be specified if dynamic
> reconfiguration is supported.
> 
> One PCS may contain "shared logic in core" which can be connected to
> other PCSs with "shared logic in example design." This primarily refers
> to clocking resources, allowing a reference clock to be shared by a bank
> of PCSs. To support this, if #clock-cells is defined then the PCS will
> register itself as a clock provider for other PCSs.
> 
> Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
> ---
> 
> Changes in v2:
> - Change base compatible to just xlnx,pcs
> - Drop #clock-cells description
> - Move #clock-cells after compatible
> - Remove second example
> - Rename pcs-modes to xlnx,pcs-modes
> - Reword commit message
> 
>  .../devicetree/bindings/net/xilinx,pcs.yaml   | 115 ++++++++++++++++++
>  1 file changed, 115 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/xilinx,pcs.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/xilinx,pcs.yaml b/Documentation/devicetree/bindings/net/xilinx,pcs.yaml
> new file mode 100644
> index 000000000000..f9ec032127cf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/xilinx,pcs.yaml
> @@ -0,0 +1,115 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/xilinx,pcs.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx 1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP
> +
> +maintainers:
> +  - Sean Anderson <sean.anderson@seco.com>
> +
> +description:

Needs '>' modifier for paragraphs.

With that,

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

> +  This is a soft device which implements the PCS and (depending on
> +  configuration) PMA layers of an IEEE Ethernet PHY. On the MAC side, it
> +  implements GMII. It may have an attached SERDES (internal or external), or
> +  may directly use LVDS IO resources. Depending on the configuration, it may
> +  implement 1000BASE-X, SGMII, 2500BASE-X, or 2.5G SGMII.
> +
> +  This device has a notion of "shared logic" such as reset and clocking
> +  resources which must be shared between multiple PCSs using the same I/O
> +  banks. Each PCS can be configured to have the shared logic in the "core"
> +  (instantiated internally and made available to other PCSs) or in the "example
> +  design" (provided by another PCS). PCSs with shared logic in the core are
> +  reset controllers, and generally provide several resets for other PCSs in the
> +  same bank.

[net-next PATCH v2 14/14] of: property: Add device link support for PCS

[Sean Anderson]

This adds device link support for PCS devices, providing
better probe ordering.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---

Changes in v2:
- Reorder pcs_handle to come before suffix props

 drivers/of/property.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/of/property.c b/drivers/of/property.c
index c41190e47111..86d9afcbfc70 100644
--- a/drivers/of/property.c
+++ b/drivers/of/property.c
@@ -1373,6 +1373,7 @@ DEFINE_SIMPLE_PROP(post_init_providers, "post-init-providers", NULL)
 DEFINE_SIMPLE_PROP(access_controllers, "access-controllers", "#access-controller-cells")
 DEFINE_SIMPLE_PROP(pses, "pses", "#pse-cells")
 DEFINE_SIMPLE_PROP(power_supplies, "power-supplies", NULL)
+DEFINE_SIMPLE_PROP(pcs_handle, "pcs-handle", NULL)
 DEFINE_SUFFIX_PROP(regulators, "-supply", NULL)
 DEFINE_SUFFIX_PROP(gpio, "-gpio", "#gpio-cells")
 
@@ -1524,6 +1525,7 @@ static const struct supplier_bindings of_supplier_bindings[] = {
 	{ .parse_prop = parse_interrupts, },
 	{ .parse_prop = parse_interrupt_map, },
 	{ .parse_prop = parse_access_controllers, },
+	{ .parse_prop = parse_pcs_handle, },
 	{ .parse_prop = parse_regulators, },
 	{ .parse_prop = parse_gpio, },
 	{ .parse_prop = parse_gpios, },
-- 
2.35.1.1320.gc452695387.dirty

Re: [net-next PATCH v2 14/14] of: property: Add device link support for PCS

[Rob Herring (Arm)]

On Mon, 07 Apr 2025 19:22:49 -0400, Sean Anderson wrote:
> This adds device link support for PCS devices, providing
> better probe ordering.
> 
> Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
> ---
> 
> Changes in v2:
> - Reorder pcs_handle to come before suffix props
> 
>  drivers/of/property.c | 2 ++
>  1 file changed, 2 insertions(+)
> 

Acked-by: Rob Herring (Arm) <robh@kernel.org>

Re: [net-next PATCH v2 14/14] of: property: Add device link support for PCS

[Saravana Kannan]

On Fri, Apr 11, 2025 at 7:47 AM Rob Herring (Arm) <robh@kernel.org> wrote:
>
>
> On Mon, 07 Apr 2025 19:22:49 -0400, Sean Anderson wrote:
> > This adds device link support for PCS devices, providing
> > better probe ordering.
> >
> > Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
> > ---
> >
> > Changes in v2:
> > - Reorder pcs_handle to come before suffix props
> >
> >  drivers/of/property.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
>
> Acked-by: Rob Herring (Arm) <robh@kernel.org>
>

Reviewed-by: Saravana Kannan <saravanak@google.com>

Re: [net-next PATCH v2 00/14] Add PCS core support

[Jakub Kicinski]

On Mon,  7 Apr 2025 19:17:31 -0400 Sean Anderson wrote:
> This series depends on [1,2], and they have been included at the
> beginning so CI will run. However, I expect them to be reviewed/applied
> outside the net-next tree.

These appear to break the build:

drivers/acpi/property.c:1669:39: error: initialization of ‘int (*)(const struct fwnode_handle *, const char *, const char *, int,  unsigned int,  struct fwnode_reference_args *)’ from incompatible pointer type ‘int (*)(const struct fwnode_handle *, const char *, const char *, unsigned int,  unsigned int,  struct fwnode_reference_args *)’ [-Wincompatible-pointer-types]
 1669 |                 .get_reference_args = acpi_fwnode_get_reference_args,   \

Could you post as RFC until we can actually merge this? I'm worried 
some sleep deprived maintainer may miss the note in the cover letter
and just apply it all to net-next..
-- 
pw-bot: cr

Re: [net-next PATCH v2 00/14] Add PCS core support

[Sean Anderson]

On 4/8/25 10:50, Jakub Kicinski wrote:
> On Mon,  7 Apr 2025 19:17:31 -0400 Sean Anderson wrote:
>> This series depends on [1,2], and they have been included at the
>> beginning so CI will run. However, I expect them to be reviewed/applied
>> outside the net-next tree.
> 
> These appear to break the build:
> 
> drivers/acpi/property.c:1669:39: error: initialization of ‘int (*)(const struct fwnode_handle *, const char *, const char *, int,  unsigned int,  struct fwnode_reference_args *)’ from incompatible pointer type ‘int (*)(const struct fwnode_handle *, const char *, const char *, unsigned int,  unsigned int,  struct fwnode_reference_args *)’ [-Wincompatible-pointer-types]
>  1669 |                 .get_reference_args = acpi_fwnode_get_reference_args,   \
> 
> Could you post as RFC until we can actually merge this? I'm worried 
> some sleep deprived maintainer may miss the note in the cover letter
> and just apply it all to net-next..

I would really like to keep RFC off the titles since some reviewers don't
pay attention to RFC series.

Would [DO NOT MERGE] in the subject be OK?

--Sean

Re: [net-next PATCH v2 00/14] Add PCS core support

[Jakub Kicinski]

On Tue, 8 Apr 2025 11:30:43 -0400 Sean Anderson wrote:
> > These appear to break the build:
> > 
> > drivers/acpi/property.c:1669:39: error: initialization of ‘int (*)(const struct fwnode_handle *, const char *, const char *, int,  unsigned int,  struct fwnode_reference_args *)’ from incompatible pointer type ‘int (*)(const struct fwnode_handle *, const char *, const char *, unsigned int,  unsigned int,  struct fwnode_reference_args *)’ [-Wincompatible-pointer-types]
> >  1669 |                 .get_reference_args = acpi_fwnode_get_reference_args,   \
> > 
> > Could you post as RFC until we can actually merge this? I'm worried 
> > some sleep deprived maintainer may miss the note in the cover letter
> > and just apply it all to net-next..  
> 
> I would really like to keep RFC off the titles since some reviewers don't
> pay attention to RFC series.
> 
> Would [DO NOT MERGE] in the subject be OK?

That works too.

Re: [net-next PATCH v2 00/14] Add PCS core support

[Russell King (Oracle)]

On Tue, Apr 08, 2025 at 11:30:43AM -0400, Sean Anderson wrote:
> On 4/8/25 10:50, Jakub Kicinski wrote:
> > On Mon,  7 Apr 2025 19:17:31 -0400 Sean Anderson wrote:
> >> This series depends on [1,2], and they have been included at the
> >> beginning so CI will run. However, I expect them to be reviewed/applied
> >> outside the net-next tree.
> > 
> > These appear to break the build:
> > 
> > drivers/acpi/property.c:1669:39: error: initialization of ‘int (*)(const struct fwnode_handle *, const char *, const char *, int,  unsigned int,  struct fwnode_reference_args *)’ from incompatible pointer type ‘int (*)(const struct fwnode_handle *, const char *, const char *, unsigned int,  unsigned int,  struct fwnode_reference_args *)’ [-Wincompatible-pointer-types]
> >  1669 |                 .get_reference_args = acpi_fwnode_get_reference_args,   \
> > 
> > Could you post as RFC until we can actually merge this? I'm worried 
> > some sleep deprived maintainer may miss the note in the cover letter
> > and just apply it all to net-next..
> 
> I would really like to keep RFC off the titles since some reviewers don't
> pay attention to RFC series.
> 
> Would [DO NOT MERGE] in the subject be OK?

I'd bet that those who have decided "RFC means the patch series is not
ready" will take such a notice to also mean the same, and ignore it.

I think there needs to be some kind of push-back against these
maintainers who explicitly state that they ignore RFC series - making
it basically anti-social behaviour in the kernel community.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!