From: Rob Herring <robh@kernel.org>
To: Praveen Talari <quic_ptalari@quicinc.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Viresh Kumar <vireshk@kernel.org>, Nishanth Menon <nm@ti.com>,
Stephen Boyd <sboyd@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-serial@vger.kernel.org, devicetree@vger.kernel.org,
linux-pm@vger.kernel.org, psodagud@quicinc.com,
djaggi@quicinc.com, quic_msavaliy@quicinc.com,
quic_vtanuku@quicinc.com, quic_arandive@quicinc.com,
quic_mnaresh@quicinc.com, quic_shazhuss@quicinc.com,
Nikunj Kela <quic_nkela@quicinc.com>
Subject: Re: [PATCH v1 2/9] dt-bindings: serial: describe SA8255p
Date: Fri, 11 Apr 2025 12:57:30 -0500 [thread overview]
Message-ID: <20250411175730.GA3642862-robh@kernel.org> (raw)
In-Reply-To: <20250410174010.31588-3-quic_ptalari@quicinc.com>
On Thu, Apr 10, 2025 at 11:10:03PM +0530, Praveen Talari wrote:
> From: Nikunj Kela <quic_nkela@quicinc.com>
>
> SA8255p platform abstracts resources such as clocks, interconnect and
> GPIO pins configuration in Firmware. SCMI power and perf protocols are
> used to send request for resource configurations.
>
> Add DT bindings for the QUP GENI UART controller on sa8255p platform.
>
> Co-developed-by: Praveen Talari <quic_ptalari@quicinc.com>
> Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com>
Your tags go last because you touched this last (I assume). The order
here would be correct if you were the original author, but Nikunj made
significant enough changes to change the author and also sent the
patches. The sender always has the last S-o-b (until the maintainer
adds their's when applying).
> Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
> ---
> .../serial/qcom,sa8255p-geni-uart.yaml | 59 +++++++++++++++++++
> 1 file changed, 59 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
>
> diff --git a/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
> new file mode 100644
> index 000000000000..0dbfbfa1d504
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Geni based QUP UART interface
> +
> +maintainers:
> + - Praveen Talari <quic_ptalari@quicinc.com>
> +
> +allOf:
> + - $ref: /schemas/serial/serial.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,sa8255p-geni-uart
> + - qcom,sa8255p-geni-debug-uart
> +
> + interrupts:
> + minItems: 1
> + items:
> + - description: UART core irq
> + - description: Wakeup irq (RX GPIO)
If this is a wakeup source, then you should have interrupt-names with
'wakeup' for the 2nd irq.
> +
> + power-domains:
> + minItems: 2
> + maxItems: 2
> +
> + power-domain-names:
> + items:
> + - const: power
> + - const: perf
> +
> + reg:
> + maxItems: 1
'reg' goes after compatible.
> +
> +required:
> + - compatible
> + - interrupts
> + - reg
> + - power-domains
> + - power-domain-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + serial@990000 {
> + compatible = "qcom,sa8255p-geni-uart";
> + reg = <0x990000 0x4000>;
> + interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>;
> + power-domain-names = "power", "perf";
> + };
> +...
> --
> 2.17.1
>
next prev parent reply other threads:[~2025-04-11 17:57 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-10 17:40 [PATCH v1 0/9] Enable QUPs and Serial on SA8255p Qualcomm platforms Praveen Talari
2025-04-10 17:40 ` [PATCH v1 1/9] opp: add new helper API dev_pm_opp_set_level() Praveen Talari
2025-04-10 17:40 ` [PATCH v1 2/9] dt-bindings: serial: describe SA8255p Praveen Talari
2025-04-11 17:57 ` Rob Herring [this message]
2025-04-11 18:15 ` Praveen Talari
2025-04-10 17:40 ` [PATCH v1 3/9] dt-bindings: qcom: geni-se: " Praveen Talari
2025-04-10 18:34 ` Rob Herring (Arm)
2025-04-10 17:40 ` [PATCH v1 4/9] soc: qcom: geni-se: Enable QUPs on SA8255p Qualcomm platforms Praveen Talari
2025-04-11 18:40 ` kernel test robot
2025-04-11 18:40 ` kernel test robot
2025-04-14 7:56 ` Jiri Slaby
2025-04-14 17:59 ` Praveen Talari
2025-04-10 17:40 ` [PATCH v1 5/9] serial: qcom-geni: move resource initialization to separate functions Praveen Talari
2025-04-14 7:58 ` Jiri Slaby
2025-04-10 17:40 ` [PATCH v1 6/9] serial: qcom-geni: move resource control logic " Praveen Talari
2025-04-14 7:59 ` Jiri Slaby
2025-04-14 8:55 ` Praveen Talari
2025-04-10 17:40 ` [PATCH v1 7/9] serial: qcom-geni: move clock-rate logic to separate function Praveen Talari
2025-04-11 19:12 ` kernel test robot
2025-04-14 8:01 ` Jiri Slaby
2025-04-10 17:40 ` [PATCH v1 8/9] serial: qcom-geni: Enable PM runtime for serial driver Praveen Talari
2025-04-10 17:40 ` [PATCH v1 9/9] serial: qcom-geni: Enable Serial on SA8255p Qualcomm platforms Praveen Talari
2025-04-14 8:09 ` Jiri Slaby
2025-04-14 17:49 ` Praveen Talari
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