Re: [PATCH v5 13/14] iio: adc: ad7768-1: add filter type and oversampling ratio attributes

Jonathan Cameron
2025-04-12T18:11:37Z

>
> -static int ad7768_set_dig_fil(struct ad7768_state *st,
> - enum ad7768_dec_rate dec_rate)
> +static int ad7768_set_sinc3_dec_rate(struct ad7768_state *st,
> + unsigned int dec_rate)
> {
> - unsigned int mode;
> + unsigned int max_dec_rate;
> + u8 dec_rate_reg[2];
> int ret;
>
> - if (dec_rate == AD7768_DEC_RATE_8 || dec_rate == AD7768_DEC_RATE_16)
> - mode = AD7768_DIG_FIL_FIL(dec_rate);
> - else
> - mode = AD7768_DIG_FIL_DEC_RATE(dec_rate);
> + /*
> + * Maximum dec_rate is limited by the MCLK_DIV value
> + * and by the ODR. The edge case is for MCLK_DIV = 2
> + * ODR = 50 SPS.
> + * max_dec_rate <= MCLK / (2 * 50)
> + */
> + max_dec_rate = st->mclk_freq / 100;
> + dec_rate = clamp_t(unsigned int, dec_rate, 32, max_dec_rate);
> + /*
> + * Calculate the equivalent value to sinc3 decimation ratio
> + * to be written on the SINC3_DECIMATION_RATE register:
> + * Value = (DEC_RATE / 32) -1
> + */
> + dec_rate = DIV_ROUND_UP(dec_rate, 32) - 1;
> + dec_rate_reg[0] = FIELD_GET(AD7768_SINC3_DEC_RATE_MSB_MSK, dec_rate);
> + dec_rate_reg[1] = FIELD_GET(AD7768_SINC3_DEC_RATE_LSB_MSK, dec_rate);
Looks like a larger big endian value. It's a little messy because of
the 12 bit mask but I think still clearer as

u16 regval = FIELD_PREP(GENMASK(11, 0), dec_rate);

unaligned_put_be16(dec_rate_reg, regval);

Avoids the use of masks to get bytes from the dec_rate value which is
is sort of backwards.

> + ret = regmap_bulk_write(st->regmap, AD7768_REG_SINC3_DEC_RATE_MSB,
> + dec_rate_reg, 2);
> + if (ret)
> + return ret;
>