From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A6C4329B790; Tue, 15 Apr 2025 15:32:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744731125; cv=none; b=jnlAorDgW8e6e4VjXkTQzuYpikrMEwg9hz1UAIIDr3hWmjelyNuaAa0IPw++cQTwEiaEsCEqjZVaZEmP/XEMBMaIoseZRqM0TQ+9jy3FpOqxxvpqdO0wp9h5B4lHRAQhs4GiVj3EyPCOplGyCvLdDvJOUMtMbc/rGjpTdDQKzaA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744731125; c=relaxed/simple; bh=O4LNTnrjuln0e+HLG18qaDAquhW6H0AMuTI2hR4oTAA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=BaQtlbmhjF6SUqx6t1cnyNWM5INIvCPJBlJWoKfr2Z7cfn+nDkfa3Yg/vQit7I5lIxmcaKsEJKtClqyvD1IfYTpEcduYScMCMPcsIcnGXE856jOBLfiW+nehy9KokOMqtxy6hRpv683VD7hjIrYar+uhF7TIQaRKCv1gN0+4dUc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=d0LOBCWb; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="d0LOBCWb" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 53FFVmJL067501 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 15 Apr 2025 10:31:48 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1744731108; bh=uX85TcdxrsRHZjYGhspXK3QgllYYf/V65NHPRH5EmCc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=d0LOBCWbIkuu5ploDXL1IvoTyey7+PoV5yyNlkxJgj31hqDSDOylSRhRzQcV+PLWb hT8hrP1oBlJJ/qPaPsy9ep0qxeat8Dl73dXod9HUoY0EVm/vqsWKJ4hE4RQhgzxmFr eSDYYXKyNypwHZCHGLXoLDSO3fAkLY3Wlm0oAEfc= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 53FFVm6X040455 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 15 Apr 2025 10:31:48 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 15 Apr 2025 10:31:48 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 15 Apr 2025 10:31:47 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53FFVlZx109804; Tue, 15 Apr 2025 10:31:47 -0500 From: Judith Mendez To: Nishanth Menon , Vignesh Raghavendra CC: Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Hari Nagalla , Beleswar Prasad , Andrew Davis , Markus Schneider-Pargmann , Devarsh Thakkar Subject: [PATCH v7 07/11] arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors Date: Tue, 15 Apr 2025 10:31:43 -0500 Message-ID: <20250415153147.1844076-8-jm@ti.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250415153147.1844076-1-jm@ti.com> References: <20250415153147.1844076-1-jm@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea From: Devarsh Thakkar For each remote proc, reserve memory for IPC and bind the mailbox assignments. Two memory regions are reserved for each remote processor. The first region of 1MB of memory is used for Vring shared buffers and the second region is used as external memory to the remote processor for the resource table and for tracebuffer allocations. Signed-off-by: Devarsh Thakkar Signed-off-by: Hari Nagalla Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 50 ++++++++++++++++++++++--- 1 file changed, 44 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts index d29f524600af0..05760507da4ed 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts @@ -49,6 +49,30 @@ reserved-memory { #size-cells = <2>; ranges; + mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9b800000 0x00 0x100000>; + no-map; + }; + + mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9b900000 0x00 0xf00000>; + no-map; + }; + + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9c800000 0x00 0x100000>; + no-map; + }; + + wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9c900000 0x00 0xf00000>; + no-map; + }; + secure_tfa_ddr: tfa@9e780000 { reg = <0x00 0x9e780000 0x00 0x80000>; no-map; @@ -58,12 +82,6 @@ secure_ddr: optee@9e800000 { reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ no-map; }; - - wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { - compatible = "shared-dma-pool"; - reg = <0x00 0x9c900000 0x00 0x01e00000>; - no-map; - }; }; vmain_pd: regulator-0 { @@ -640,6 +658,26 @@ mbox_mcu_r5_0: mbox-mcu-r5-0 { }; }; +&wkup_r5fss0 { + status = "okay"; +}; + +&wkup_r5fss0_core0 { + mboxes = <&mailbox0_cluster0 &mbox_r5_0>; + memory-region = <&wkup_r5fss0_core0_dma_memory_region>, + <&wkup_r5fss0_core0_memory_region>; +}; + +&mcu_r5fss0 { + status = "okay"; +}; + +&mcu_r5fss0_core0 { + mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>; + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; +}; + &main_uart0 { pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; -- 2.49.0