From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 615FE29D19; Thu, 24 Apr 2025 00:44:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745455489; cv=none; b=qcfoPp2ZMGaiObhw4jylnW++zXTDptu7JYv3b6meSEqullb4yvRwC3EEM3cT7kBYLU1W0WFaGJ5Gbejs2u0+fPJjomSuXhIqxlRE8M/p6ft4j4yXQtWDEHku/+pVLhsxdqUsHTlTv6F60Gtsk9rF1WUs+Zw1rhLU7qXUblMLIa8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745455489; c=relaxed/simple; bh=9XweFNfHhe7EX+TrllqLBd/BK2OVdDV9V+0ba/Rb3EU=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qbt9L78gY/Rb+nO4aRB5IrEi0Y+ORE5AIyOw8WXqRSI5vGBT9wc3YfOKqortxVoEytVFc39zYpG0/Qdr7pBYoos724yN5jlaZ1qX11FlW2NnTpXkhZxviSRpi2Mumyj1CY/eLuFsel6cLYDW2e8SrnfEFUi5z86eZxCFW3A4Huw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1F01E106F; Wed, 23 Apr 2025 17:44:43 -0700 (PDT) Received: from minigeek.lan (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A2DF73F59E; Wed, 23 Apr 2025 17:44:45 -0700 (PDT) Date: Thu, 24 Apr 2025 01:43:41 +0100 From: Andre Przywara To: Yixun Lan Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, netdev@vger.kernel.org Subject: Re: [PATCH 4/5] arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board Message-ID: <20250424014341.7006ea65@minigeek.lan> In-Reply-To: <20250423-01-sun55i-emac0-v1-4-46ee4c855e0a@gentoo.org> References: <20250423-01-sun55i-emac0-v1-0-46ee4c855e0a@gentoo.org> <20250423-01-sun55i-emac0-v1-4-46ee4c855e0a@gentoo.org> Organization: Arm Ltd. X-Mailer: Claws Mail 4.2.0 (GTK 3.24.31; x86_64-slackware-linux-gnu) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Wed, 23 Apr 2025 22:03:25 +0800 Yixun Lan wrote: Hi Yixun, > On Radxa A5E board, the EMAC0 connect to an external YT8531C PHY, > which features a 25MHz crystal, and using PH8 pin as PHY reset. > > Tested on A5E board with schematic V1.20. Can you please add a name to the /aliases node, to make U-Boot add a MAC address? ethernet0 = &emac0; > > Signed-off-by: Yixun Lan > --- > arch/arm64/boot/dts/allwinner/sun55i-a527-radxa-a5e.dts | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-radxa-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-radxa-a5e.dts > index 912e1bda974ce5f64c425e371357b1a78b7c13dd..b3399a28badb5172801e47b8a45d5b753fc56ef1 100644 > --- a/arch/arm64/boot/dts/allwinner/sun55i-a527-radxa-a5e.dts > +++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-radxa-a5e.dts > @@ -54,6 +54,23 @@ &ehci1 { > status = "okay"; > }; > > +&emac0 { > + phy-mode = "rgmii"; > + phy-handle = <&ext_rgmii_phy>; Can you please add the phy-supply here, which should be CLDO3? It's referenced by other nodes, so would be enabled already,but each node should be self-contained. Cheers, Andre > + > + allwinner,tx-delay-ps = <300>; > + allwinner,rx-delay-ps = <400>; > + > + status = "okay"; > +}; > + > +&mdio0 { > + ext_rgmii_phy: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + }; > +}; > + > &mmc0 { > vmmc-supply = <®_cldo3>; > cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_DOWN)>; /* PF6 */ >