From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Abhinav Kumar <quic_abhinavk@quicinc.com>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Krishna Manikandan <quic_mkrishn@quicinc.com>,
Jonathan Marek <jonathan@marek.ca>,
Kuogee Hsieh <quic_khsieh@quicinc.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Dmitry Baryshkov <lumag@kernel.org>,
Rob Clark <robdclark@gmail.com>,
Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Rob Clark <robdclark@chromium.org>,
linux-clk@vger.kernel.org,
Srinivas Kandagatla <srini@kernel.org>,
Jessica Zhang <quic_jesszhan@quicinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>
Subject: [PATCH v5 00/24] drm/msm: Add support for SM8750
Date: Wed, 30 Apr 2025 15:00:30 +0200 [thread overview]
Message-ID: <20250430-b4-sm8750-display-v5-0-8cab30c3e4df@linaro.org> (raw)
Hi,
Dependency / Rabased on top of
==============================
https://lore.kernel.org/all/20241214-dpu-drop-features-v1-0-988f0662cb7e@linaro.org/
Merging
=======
DSI works! With the fixes here and debugging help from Jessica and
Abhinav, the DSI panel works properly.
The display clock controller patch can go separately.
Changes in v5:
=============
- Add ack/rb tags
- New patches:
#6: clk: qcom: dispcc-sm8750: Fix setting rate byte and pixel clocks
#14: drm/msm/dsi/phy: Toggle back buffer resync after preparing PLL
#15: drm/msm/dsi/phy: Define PHY_CMN_CTRL_0 bitfields
#16: drm/msm/dsi/phy: Fix reading zero as PLL rates when unprepared
#17: drm/msm/dsi/phy: Fix missing initial VCO rate
- Patch drm/msm/dsi: Add support for SM8750:
- Only reparent byte and pixel clocks while PLLs is prepared. Setting
rate works fine with earlier DISP CC patch for enabling their parents
during rate change.
- Link to v4: https://lore.kernel.org/r/20250311-b4-sm8750-display-v4-0-da6b3e959c76@linaro.org
Changes in v4
=============
- Add ack/rb tags
- Implement Dmitry's feedback (lower-case hex, indentation, pass
mdss_ver instead of ctl), patches:
drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPU
drm/msm/dpu: Implement CTL_PIPE_ACTIVE for v12.0 DPU
- Rebase on latest next
- Drop applied two first patches
- Link to v3: https://lore.kernel.org/r/20250221-b4-sm8750-display-v3-0-3ea95b1630ea@linaro.org
Changes in v3
=============
- Add ack/rb tags
- #5: dt-bindings: display/msm: dp-controller: Add SM8750:
Extend commit msg
- #7: dt-bindings: display/msm: qcom,sm8750-mdss: Add SM8750:
- Properly described interconnects
- Use only one compatible and contains for the sub-blocks (Rob)
- #12: drm/msm/dsi: Add support for SM8750:
Drop 'struct msm_dsi_config sm8750_dsi_cfg' and use sm8650 one.
- drm/msm/dpu: Implement new v12.0 DPU differences
Split into several patches
- Link to v2: https://lore.kernel.org/r/20250217-b4-sm8750-display-v2-0-d201dcdda6a4@linaro.org
Changes in v2
=============
- Implement LM crossbar, 10-bit alpha and active layer changes:
New patch: drm/msm/dpu: Implement new v12.0 DPU differences
- New patch: drm/msm/dpu: Add missing "fetch" name to set_active_pipes()
- Add CDM
- Split some DPU patch pieces into separate patches:
drm/msm/dpu: Drop useless comments
drm/msm/dpu: Add LM_7, DSC_[67], PP_[67] and MERGE_3D_5
drm/msm/dpu: Add handling of LM_6 and LM_7 bits in pending flush mask
- Split DSI and DSI PHY patches
- Mention CLK_OPS_PARENT_ENABLE in DSI commit
- Mention DSI PHY PLL work:
https://patchwork.freedesktop.org/patch/542000/?series=119177&rev=1
- DPU: Drop SSPP_VIG4 comments
- DPU: Add CDM
- Link to v1: https://lore.kernel.org/r/20250109-b4-sm8750-display-v1-0-b3f15faf4c97@linaro.org
Best regards,
Krzysztof
---
Krzysztof Kozlowski (24):
dt-bindings: display/msm: dsi-phy-7nm: Add SM8750
dt-bindings: display/msm: dsi-controller-main: Add SM8750
dt-bindings: display/msm: dp-controller: Add SM8750
dt-bindings: display/msm: qcom,sm8650-dpu: Add SM8750
dt-bindings: display/msm: qcom,sm8750-mdss: Add SM8750
clk: qcom: dispcc-sm8750: Fix setting rate byte and pixel clocks
drm/msm/dpu: Add missing "fetch" name to set_active_pipes()
drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE on mixer reset
drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE on ctl_path reset
drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE before blend setup
drm/msm/dpu: Drop useless comments
drm/msm/dpu: Add LM_7, DSC_[67], PP_[67] and MERGE_3D_5
drm/msm/dpu: Add handling of LM_6 and LM_7 bits in pending flush mask
drm/msm/dsi/phy: Toggle back buffer resync after preparing PLL
drm/msm/dsi/phy: Define PHY_CMN_CTRL_0 bitfields
drm/msm/dsi/phy: Fix reading zero as PLL rates when unprepared
drm/msm/dsi/phy: Fix missing initial VCO rate
drm/msm/dsi/phy: Add support for SM8750
drm/msm/dsi: Add support for SM8750
drm/msm/dpu: Add support for SM8750
drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPU
drm/msm/dpu: Implement CTL_PIPE_ACTIVE for v12.0 DPU
drm/msm/dpu: Implement LM crossbar for v12.0 DPU
drm/msm/mdss: Add support for SM8750
.../bindings/display/msm/dp-controller.yaml | 4 +
.../bindings/display/msm/dsi-controller-main.yaml | 54 ++-
.../bindings/display/msm/dsi-phy-7nm.yaml | 1 +
.../bindings/display/msm/qcom,sm8650-dpu.yaml | 1 +
.../bindings/display/msm/qcom,sm8750-mdss.yaml | 470 +++++++++++++++++++
drivers/clk/qcom/dispcc-sm8750.c | 4 +-
.../drm/msm/disp/dpu1/catalog/dpu_12_0_sm8750.h | 496 +++++++++++++++++++++
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 58 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 35 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 71 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 19 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 210 ++++++++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 18 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 6 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
drivers/gpu/drm/msm/dsi/dsi.h | 2 +
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 14 +
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c | 81 ++++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 2 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 157 ++++++-
drivers/gpu/drm/msm/msm_mdss.c | 33 ++
drivers/gpu/drm/msm/msm_mdss.h | 1 +
.../gpu/drm/msm/registers/display/dsi_phy_7nm.xml | 25 +-
27 files changed, 1730 insertions(+), 49 deletions(-)
---
base-commit: 4ec6605d1f7e5df173ffa871cce72567f820a9c2
change-id: 20250109-b4-sm8750-display-6ea537754af1
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
next reply other threads:[~2025-04-30 13:01 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-30 13:00 Krzysztof Kozlowski [this message]
2025-04-30 13:00 ` [PATCH v5 01/24] dt-bindings: display/msm: dsi-phy-7nm: Add SM8750 Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 02/24] dt-bindings: display/msm: dsi-controller-main: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 03/24] dt-bindings: display/msm: dp-controller: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 04/24] dt-bindings: display/msm: qcom,sm8650-dpu: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 05/24] dt-bindings: display/msm: qcom,sm8750-mdss: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 06/24] clk: qcom: dispcc-sm8750: Fix setting rate byte and pixel clocks Krzysztof Kozlowski
2025-05-02 22:42 ` Dmitry Baryshkov
2025-05-05 6:15 ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 07/24] drm/msm/dpu: Add missing "fetch" name to set_active_pipes() Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 08/24] drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE on mixer reset Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 09/24] drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE on ctl_path reset Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 10/24] drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE before blend setup Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 11/24] drm/msm/dpu: Drop useless comments Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 12/24] drm/msm/dpu: Add LM_7, DSC_[67], PP_[67] and MERGE_3D_5 Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 13/24] drm/msm/dpu: Add handling of LM_6 and LM_7 bits in pending flush mask Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 14/24] drm/msm/dsi/phy: Toggle back buffer resync after preparing PLL Krzysztof Kozlowski
2025-05-02 22:43 ` Dmitry Baryshkov
2025-04-30 13:00 ` [PATCH v5 15/24] drm/msm/dsi/phy: Define PHY_CMN_CTRL_0 bitfields Krzysztof Kozlowski
2025-05-02 22:44 ` Dmitry Baryshkov
2025-05-05 6:17 ` Krzysztof Kozlowski
2025-05-05 14:14 ` Dmitry Baryshkov
2025-05-20 10:57 ` Krzysztof Kozlowski
2025-05-20 21:23 ` Dmitry Baryshkov
2025-05-21 6:11 ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 16/24] drm/msm/dsi/phy: Fix reading zero as PLL rates when unprepared Krzysztof Kozlowski
2025-04-30 13:11 ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 17/24] drm/msm/dsi/phy: Fix missing initial VCO rate Krzysztof Kozlowski
2025-05-02 22:48 ` Dmitry Baryshkov
2025-04-30 13:00 ` [PATCH v5 18/24] drm/msm/dsi/phy: Add support for SM8750 Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 19/24] drm/msm/dsi: " Krzysztof Kozlowski
2025-05-02 22:52 ` Dmitry Baryshkov
2025-05-05 6:45 ` Krzysztof Kozlowski
2025-05-05 12:26 ` Dmitry Baryshkov
2025-05-05 12:35 ` Dmitry Baryshkov
2025-05-05 21:28 ` Abhinav Kumar
2025-05-19 15:11 ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 20/24] drm/msm/dpu: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 21/24] drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPU Krzysztof Kozlowski
2025-05-05 12:24 ` Dmitry Baryshkov
2025-05-19 16:49 ` Abhinav Kumar
2025-05-19 16:53 ` Dmitry Baryshkov
2025-05-23 6:55 ` Abel Vesa
2025-05-23 7:02 ` Abel Vesa
2025-05-23 8:29 ` Dmitry Baryshkov
2025-05-23 9:50 ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 22/24] drm/msm/dpu: Implement CTL_PIPE_ACTIVE " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 23/24] drm/msm/dpu: Implement LM crossbar " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 24/24] drm/msm/mdss: Add support for SM8750 Krzysztof Kozlowski
2025-05-17 0:08 ` [PATCH v5 00/24] drm/msm: " Jessica Zhang
2025-05-19 14:52 ` Krzysztof Kozlowski
2025-05-19 15:07 ` Dmitry Baryshkov
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