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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Abhinav Kumar <quic_abhinavk@quicinc.com>,
	Sean Paul <sean@poorly.run>,
	 Marijn Suijten <marijn.suijten@somainline.org>,
	 David Airlie <airlied@gmail.com>,
	Simona Vetter <simona@ffwll.ch>,
	 Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	 Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	 Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	 Krishna Manikandan <quic_mkrishn@quicinc.com>,
	 Jonathan Marek <jonathan@marek.ca>,
	Kuogee Hsieh <quic_khsieh@quicinc.com>,
	 Neil Armstrong <neil.armstrong@linaro.org>,
	 Dmitry Baryshkov <lumag@kernel.org>,
	Rob Clark <robdclark@gmail.com>,
	 Bjorn Andersson <andersson@kernel.org>,
	 Michael Turquette <mturquette@baylibre.com>,
	 Stephen Boyd <sboyd@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	 freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org,
	 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	 Rob Clark <robdclark@chromium.org>,
	linux-clk@vger.kernel.org,
	 Srinivas Kandagatla <srini@kernel.org>,
	 Jessica Zhang <quic_jesszhan@quicinc.com>,
	 Dmitry Baryshkov <lumag@kernel.org>
Subject: [PATCH v5 07/24] drm/msm/dpu: Add missing "fetch" name to set_active_pipes()
Date: Wed, 30 Apr 2025 15:00:37 +0200	[thread overview]
Message-ID: <20250430-b4-sm8750-display-v5-7-8cab30c3e4df@linaro.org> (raw)
In-Reply-To: <20250430-b4-sm8750-display-v5-0-8cab30c3e4df@linaro.org>

The set_active_pipes() callback configures CTL_FETCH_PIPE_ACTIVE and
newer DPU v12.0 comes with CTL_PIPE_ACTIVE, thus rename it to
set_active_fetch_pipes() to better match the purpose.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---

Changes in v2:
1. New patch
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c   | 12 ++++++------
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c |  6 +++---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h |  2 +-
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 0714936d883523e5c53bfb42f932234db76c58db..2d7af6fff2708c12520a78cc6c979b9930dffc95 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -445,9 +445,9 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
 
 	uint32_t lm_idx;
 	bool bg_alpha_enable = false;
-	DECLARE_BITMAP(fetch_active, SSPP_MAX);
+	DECLARE_BITMAP(active_fetch, SSPP_MAX);
 
-	memset(fetch_active, 0, sizeof(fetch_active));
+	memset(active_fetch, 0, sizeof(active_fetch));
 	drm_atomic_crtc_for_each_plane(plane, crtc) {
 		state = plane->state;
 		if (!state)
@@ -464,7 +464,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
 		if (pstate->stage == DPU_STAGE_BASE && format->alpha_enable)
 			bg_alpha_enable = true;
 
-		set_bit(pstate->pipe.sspp->idx, fetch_active);
+		set_bit(pstate->pipe.sspp->idx, active_fetch);
 		_dpu_crtc_blend_setup_pipe(crtc, plane,
 					   mixer, cstate->num_mixers,
 					   pstate->stage,
@@ -472,7 +472,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
 					   &pstate->pipe, 0, stage_cfg);
 
 		if (pstate->r_pipe.sspp) {
-			set_bit(pstate->r_pipe.sspp->idx, fetch_active);
+			set_bit(pstate->r_pipe.sspp->idx, active_fetch);
 			_dpu_crtc_blend_setup_pipe(crtc, plane,
 						   mixer, cstate->num_mixers,
 						   pstate->stage,
@@ -492,8 +492,8 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
 		}
 	}
 
-	if (ctl->ops.set_active_pipes)
-		ctl->ops.set_active_pipes(ctl, fetch_active);
+	if (ctl->ops.set_active_fetch_pipes)
+		ctl->ops.set_active_fetch_pipes(ctl, active_fetch);
 
 	_dpu_crtc_program_lm_output_roi(crtc);
 }
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
index 216dfcabcb92d410ce185c0d34db69c99930d2b8..951d5dccab6faf34a519d06683514aea1ee6ef60 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
@@ -698,8 +698,8 @@ static void dpu_hw_ctl_reset_intf_cfg_v1(struct dpu_hw_ctl *ctx,
 	}
 }
 
-static void dpu_hw_ctl_set_fetch_pipe_active(struct dpu_hw_ctl *ctx,
-	unsigned long *fetch_active)
+static void dpu_hw_ctl_set_active_fetch_pipes(struct dpu_hw_ctl *ctx,
+					      unsigned long *fetch_active)
 {
 	int i;
 	u32 val = 0;
@@ -787,7 +787,7 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(struct drm_device *dev,
 		c->ops.update_pending_flush_dspp = dpu_hw_ctl_update_pending_flush_dspp;
 
 	if (mdss_ver->core_major_ver >= 7)
-		c->ops.set_active_pipes = dpu_hw_ctl_set_fetch_pipe_active;
+		c->ops.set_active_fetch_pipes = dpu_hw_ctl_set_active_fetch_pipes;
 
 	c->idx = cfg->id;
 	c->mixer_count = mixer_count;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
index aa560df698ed4e57a25e4a893d7333e19b065fe8..1b40d8cc92865e31e5ac4a8c3ee8fac8c5499bbd 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
@@ -254,7 +254,7 @@ struct dpu_hw_ctl_ops {
 	void (*setup_blendstage)(struct dpu_hw_ctl *ctx,
 		enum dpu_lm lm, struct dpu_hw_stage_cfg *cfg);
 
-	void (*set_active_pipes)(struct dpu_hw_ctl *ctx,
+	void (*set_active_fetch_pipes)(struct dpu_hw_ctl *ctx,
 		unsigned long *fetch_active);
 };
 

-- 
2.45.2


  parent reply	other threads:[~2025-04-30 13:01 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-30 13:00 [PATCH v5 00/24] drm/msm: Add support for SM8750 Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 01/24] dt-bindings: display/msm: dsi-phy-7nm: Add SM8750 Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 02/24] dt-bindings: display/msm: dsi-controller-main: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 03/24] dt-bindings: display/msm: dp-controller: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 04/24] dt-bindings: display/msm: qcom,sm8650-dpu: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 05/24] dt-bindings: display/msm: qcom,sm8750-mdss: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 06/24] clk: qcom: dispcc-sm8750: Fix setting rate byte and pixel clocks Krzysztof Kozlowski
2025-05-02 22:42   ` Dmitry Baryshkov
2025-05-05  6:15     ` Krzysztof Kozlowski
2025-04-30 13:00 ` Krzysztof Kozlowski [this message]
2025-04-30 13:00 ` [PATCH v5 08/24] drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE on mixer reset Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 09/24] drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE on ctl_path reset Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 10/24] drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE before blend setup Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 11/24] drm/msm/dpu: Drop useless comments Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 12/24] drm/msm/dpu: Add LM_7, DSC_[67], PP_[67] and MERGE_3D_5 Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 13/24] drm/msm/dpu: Add handling of LM_6 and LM_7 bits in pending flush mask Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 14/24] drm/msm/dsi/phy: Toggle back buffer resync after preparing PLL Krzysztof Kozlowski
2025-05-02 22:43   ` Dmitry Baryshkov
2025-04-30 13:00 ` [PATCH v5 15/24] drm/msm/dsi/phy: Define PHY_CMN_CTRL_0 bitfields Krzysztof Kozlowski
2025-05-02 22:44   ` Dmitry Baryshkov
2025-05-05  6:17     ` Krzysztof Kozlowski
2025-05-05 14:14       ` Dmitry Baryshkov
2025-05-20 10:57     ` Krzysztof Kozlowski
2025-05-20 21:23       ` Dmitry Baryshkov
2025-05-21  6:11         ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 16/24] drm/msm/dsi/phy: Fix reading zero as PLL rates when unprepared Krzysztof Kozlowski
2025-04-30 13:11   ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 17/24] drm/msm/dsi/phy: Fix missing initial VCO rate Krzysztof Kozlowski
2025-05-02 22:48   ` Dmitry Baryshkov
2025-04-30 13:00 ` [PATCH v5 18/24] drm/msm/dsi/phy: Add support for SM8750 Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 19/24] drm/msm/dsi: " Krzysztof Kozlowski
2025-05-02 22:52   ` Dmitry Baryshkov
2025-05-05  6:45     ` Krzysztof Kozlowski
2025-05-05 12:26       ` Dmitry Baryshkov
2025-05-05 12:35   ` Dmitry Baryshkov
2025-05-05 21:28     ` Abhinav Kumar
2025-05-19 15:11       ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 20/24] drm/msm/dpu: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 21/24] drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPU Krzysztof Kozlowski
2025-05-05 12:24   ` Dmitry Baryshkov
2025-05-19 16:49     ` Abhinav Kumar
2025-05-19 16:53       ` Dmitry Baryshkov
2025-05-23  6:55   ` Abel Vesa
2025-05-23  7:02     ` Abel Vesa
2025-05-23  8:29       ` Dmitry Baryshkov
2025-05-23  9:50       ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 22/24] drm/msm/dpu: Implement CTL_PIPE_ACTIVE " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 23/24] drm/msm/dpu: Implement LM crossbar " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 24/24] drm/msm/mdss: Add support for SM8750 Krzysztof Kozlowski
2025-05-17  0:08 ` [PATCH v5 00/24] drm/msm: " Jessica Zhang
2025-05-19 14:52   ` Krzysztof Kozlowski
2025-05-19 15:07     ` Dmitry Baryshkov

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