[PATCH 4/4] LoongArch: dts: Add initial devicetree for CTCISZ Ninenine Pi

[Yao Zi <ziyao@disroot.org>]

Enable UART0 as it's the boot UART used by firmware.

Signed-off-by: Yao Zi <ziyao@disroot.org>
---
 arch/loongarch/boot/dts/Makefile              |  1 +
 .../boot/dts/ls2k0300-ctcisz-nineninepi.dts   | 41 +++++++++++++++++++
 2 files changed, 42 insertions(+)
 create mode 100644 arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts

diff --git a/arch/loongarch/boot/dts/Makefile b/arch/loongarch/boot/dts/Makefile
index 15d5e14fe418..e55df9f385af 100644
--- a/arch/loongarch/boot/dts/Makefile
+++ b/arch/loongarch/boot/dts/Makefile
@@ -1,3 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 dtb-y = loongson-2k0500-ref.dtb loongson-2k1000-ref.dtb loongson-2k2000-ref.dtb
+dtb-y += ls2k0300-ctcisz-nineninepi.dtb
diff --git a/arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts b/arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts
new file mode 100644
index 000000000000..a67a8ce4211e
--- /dev/null
+++ b/arch/loongarch/boot/dts/ls2k0300-ctcisz-nineninepi.dts
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Yao Zi <ziyao@disroot.org>
+ */
+
+/dts-v1/;
+
+#include "loongson-2k0300.dtsi"
+
+/ {
+	compatible = "ctcisz,ninenine-pi", "loongson,ls2k0300";
+	model = "CTCISZ Ninenine Pi";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@200000 {
+		device_type = "memory";
+		reg = <0 0x00200000 0 0x0ee00000>,
+		      <0 0x90000000 0 0x10000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		linux,cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0 0x02000000>;
+			linux,cma-default;
+		};
+	};
+};
+
+&uart0 {
+	clock-frequency = <100000000>;
+	status = "okay";
+};
-- 
2.49.0