From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 10211269CE0 for ; Sat, 3 May 2025 15:46:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.248.80.70 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746287162; cv=none; b=JNJF7vsLDjwRoKqaK1UuOmWYE+nTUPyHlg+OgDB3muTqjyJi+/Hb/+GdYwlxc7RbbQRBJmHsczQoPbhphaXH/2oQRFmKVnxBVpzRrJKUew+hJGsh96vDcPNVhO1oaCtRBDnVSAhc8HleiwmiKroSl/y82DXsdOydBUYcsyiCy6o= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746287162; c=relaxed/simple; bh=nxPi9T3EXWqZYmDVN8QEWijkMjFoh2dboTMCqplynUs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=UpOEIORVsEWq79Bv8/b6isxtt9v4sRG3uQW1vGv9NQSj4/DlF0J6op0hL8diZTZBPNHwR3NtdEOP02gmO6/LIy2Gxr4yCnkwcDlDmsTqL4ZjB6uMP9zhFrPjm0/p7pmQUaZJUR3aQI/JpPox5wYShGSkEja7aKw8krloBhNCfco= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=andestech.com; spf=pass smtp.mailfrom=andestech.com; arc=none smtp.client-ip=60.248.80.70 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=andestech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=andestech.com Received: from Atcsqr.andestech.com (localhost [127.0.0.2] (may be forged)) by Atcsqr.andestech.com with ESMTP id 543FJxWV088174 for ; Sat, 3 May 2025 23:19:59 +0800 (+08) (envelope-from ben717@andestech.com) Received: from mail.andestech.com (ATCPCS31.andestech.com [10.0.1.89]) by Atcsqr.andestech.com with ESMTPS id 543FIrWD087702 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sat, 3 May 2025 23:18:53 +0800 (+08) (envelope-from ben717@andestech.com) Received: from swlinux02.andestech.com (10.0.15.183) by ATCPCS31.andestech.com (10.0.1.89) with Microsoft SMTP Server id 14.3.498.0; Sat, 3 May 2025 23:18:53 +0800 From: Ben Zong-You Xie To: CC: , , , , , , , , , , , , , , "Ben Zong-You Xie" Subject: [PATCH v2 9/9] riscv: defconfig: enable Andes SoC Date: Sat, 3 May 2025 23:18:29 +0800 Message-ID: <20250503151829.605006-10-ben717@andestech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250503151829.605006-1-ben717@andestech.com> References: <20250503151829.605006-1-ben717@andestech.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-DKIM-Results: atcpcs31.andestech.com; dkim=none; X-DNSRBL: X-SPAM-SOURCE-CHECK: pass X-MAIL:Atcsqr.andestech.com 543FJxWV088174 Enable Andes SoC config in defconfig to allow the default upstream kernel to boot on Voyager board. Signed-off-by: Ben Zong-You Xie --- arch/riscv/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 3c8e16d71e17..c9214635fb2f 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -25,6 +25,7 @@ CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y # CONFIG_SYSFS_SYSCALL is not set CONFIG_PROFILING=y +CONFIG_ARCH_ANDES=y CONFIG_ARCH_MICROCHIP=y CONFIG_ARCH_SIFIVE=y CONFIG_ARCH_SOPHGO=y -- 2.34.1