[PATCH 5/5] arm64: dts: rockchip: Add naneng-combphy for RK3528

Yao Zi
2025-05-08T13:53:30Z

Rockchip RK3528 ships a naneng-combphy that is shared by PCIe and USB
3.0 controllers. Describe it and the pipe-phy grf which it depends on.

Signed-off-by: Yao Zi <ziyao@disroot.org>
---
arch/arm64/boot/dts/rockchip/rk3528.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index 68059c7d7e80..cd6b9ddb3345 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/phy/phy.h>
#include <dt-bindings/clock/rockchip,rk3528-cru.h>
#include <dt-bindings/reset/rockchip,rk3528-cru.h>

@@ -334,6 +335,11 @@ vpu_grf: syscon@ff340000 {
reg = <0x0 0xff340000 0x0 0x8000>;
};

+ pipe_phy_grf: syscon@ff348000 {
+ compatible = "rockchip,rk3528-pipe-phy-grf", "syscon";
+ reg = <0x0 0xff348000 0x0 0x8000>;
+ };
+
vo_grf: syscon@ff360000 {
compatible = "rockchip,rk3528-vo-grf", "syscon";
reg = <0x0 0xff360000 0x0 0x10000>;
@@ -698,6 +704,23 @@ dmac: dma-controller@ffd60000 {
arm,pl330-periph-burst;
};

+ combphy: phy@ffdc0000 {
+ compatible = "rockchip,rk3528-naneng-combphy";
+ reg = <0x0 0xffdc0000 0x0 0x10000>;
+ #phy-cells = <1>;
+ clocks = <&cru CLK_REF_PCIE_INNER_PHY>, <&cru PCLK_PCIE_PHY>,
+ <&cru PCLK_PIPE_GRF>;
+ clock-names = "ref", "apb",
+ "pipe";
+ assigned-clocks = <&cru CLK_REF_PCIE_INNER_PHY>;
+ assigned-clock-rates = <100000000>;
+ resets = <&cru SRST_PCIE_PIPE_PHY>, <&cru SRST_P_PCIE_PHY>;
+ reset-names = "phy", "apb";
+ rockchip,pipe-grf = <&vpu_grf>;
+ rockchip,pipe-phy-grf = <&pipe_phy_grf>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3528-pinctrl";
rockchip,grf = <&ioc_grf>;
--
2.49.0