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Fri, 09 May 2025 04:06:58 -0700 (PDT) From: James Clark Date: Fri, 09 May 2025 12:05:50 +0100 Subject: [PATCH 03/14] spi: spi-fsl-dspi: restrict register range for regmap access Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250509-james-nxp-spi-v1-3-32bfcd2fea11@linaro.org> References: <20250509-james-nxp-spi-v1-0-32bfcd2fea11@linaro.org> In-Reply-To: <20250509-james-nxp-spi-v1-0-32bfcd2fea11@linaro.org> To: Vladimir Oltean , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , larisa.grigore@nxp.com, arnd@linaro.org, andrei.stefanescu@nxp.com, dan.carpenter@linaro.org Cc: linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Xulin Sun , James Clark X-Mailer: b4 0.14.0 From: Larisa Grigore DSPI registers are NOT continuous, some registers are reserved and accessing them from userspace will trigger external abort, add regmap register access table to avoid below abort: Internal error: synchronous external abort: 96000210 1 PREEMPT SMP Modules linked in: fuse dummy tun hse sch_fq_codel openvswitch nsh nf_conncount nf_nat nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 CPU: 2 PID: 18231 Comm: read_all Not tainted 5.2.33-yocto-standard #1 Hardware name: Freescale S32G275 (DT) pstate: 20000085 (nzCv daIf -PAN -UAO) pc : regmap_mmio_read32le+0x24/0x48 lr : regmap_mmio_read+0x48/0x70 sp : ffffff801123bb70 x29: ffffff801123bb70 x28: ffffffc873b5c000 x27: ffffff8010b408f0 x26: 0000000000000001 x25: 000000000000013c x24: ffffff801123be40 x23: 00000000000003ff x22: ffffff801123bcfc x21: ffffff801123bcfc x20: ffffffc873a9e500 x19: 0000000000000024 x18: 0000000000000020 x17: 0000000000000000 x16: 0000000000000000 x15: ffffffc876189160 x14: 0000000000000003 x13: ffffffc873bf73ff x12: ffffffc873bf707e x11: 0000000000000000 x10: 0000000000000000 x9 : 0000000000000000 x8 : ffffffc83fca4e00 x7 : 000000000000000f x6 : ffffffc873bf7083 x5 : 00000000fffffff9 x4 : 0000000000000002 x3 : ffffff801061f058 x2 : ffffff801061ee18 x1 : 0000000000000024 x0 : ffffff8011490024 Call trace: regmap_mmio_read32le+0x24/0x48 regmap_mmio_read+0x48/0x70 _regmap_bus_reg_read+0x38/0x48 _regmap_read+0x68/0x1b0 regmap_read+0x50/0x78 regmap_read_debugfs+0x120/0x338 regmap_map_read_file+0x44/0x58 full_proxy_read+0x68/0x98 __vfs_read+0x48/0x90 vfs_read+0xb0/0x130 ksys_read+0x7c/0x108 __arm64_sys_read+0x24/0x30 el0_svc_common.constprop.0+0x74/0x168 el0_svc_handler+0x70/0x90 el0_svc+0x8/0xc Co-developed-by: Xulin Sun Signed-off-by: Xulin Sun Signed-off-by: Larisa Grigore Signed-off-by: James Clark --- drivers/spi/spi-fsl-dspi.c | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index cb0e55a49eea..701cf56d28e7 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ // // Copyright 2013 Freescale Semiconductor, Inc. -// Copyright 2020 NXP +// Copyright 2020-2025 NXP // // Freescale DSPI driver // This file contains a driver for the Freescale DSPI @@ -137,6 +137,20 @@ enum { VF610, }; +static const struct regmap_range dspi_yes_ranges[] = { + regmap_reg_range(SPI_MCR, SPI_MCR), + regmap_reg_range(SPI_TCR, SPI_CTAR(3)), + regmap_reg_range(SPI_SR, SPI_TXFR3), + regmap_reg_range(SPI_RXFR0, SPI_RXFR3), + regmap_reg_range(SPI_CTARE(0), SPI_CTARE(3)), + regmap_reg_range(SPI_SREX, SPI_SREX), +}; + +static const struct regmap_access_table dspi_access_table = { + .yes_ranges = dspi_yes_ranges, + .n_yes_ranges = ARRAY_SIZE(dspi_yes_ranges), +}; + static const struct regmap_range dspi_volatile_ranges[] = { regmap_reg_range(SPI_MCR, SPI_TCR), regmap_reg_range(SPI_SR, SPI_SR), @@ -161,14 +175,18 @@ static const struct regmap_config dspi_regmap_config[] = { .val_bits = 32, .reg_stride = 4, .max_register = 0x88, - .volatile_table = &dspi_volatile_table + .volatile_table = &dspi_volatile_table, + .wr_table = &dspi_access_table, + .rd_table = &dspi_access_table }, [DSPI_XSPI_REGMAP] = { .reg_bits = 32, .val_bits = 32, .reg_stride = 4, .max_register = 0x13c, - .volatile_table = &dspi_volatile_table + .volatile_table = &dspi_volatile_table, + .wr_table = &dspi_access_table, + .rd_table = &dspi_access_table }, [DSPI_PUSHR] = { .name = "pushr", -- 2.34.1