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From: James Clark <james.clark@linaro.org>
To: Vladimir Oltean <olteanv@gmail.com>,
	Mark Brown <broonie@kernel.org>,  Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>, Frank Li <Frank.Li@nxp.com>,
	 Chester Lin <chester62515@gmail.com>,
	Matthias Brugger <mbrugger@suse.com>,
	 Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>,
	 NXP S32 Linux Team <s32@nxp.com>,
	Shawn Guo <shawnguo@kernel.org>,
	 Sascha Hauer <s.hauer@pengutronix.de>,
	 Pengutronix Kernel Team <kernel@pengutronix.de>,
	 Fabio Estevam <festevam@gmail.com>,
	larisa.grigore@nxp.com, arnd@linaro.org,
	 andrei.stefanescu@nxp.com, dan.carpenter@linaro.org
Cc: linux-spi@vger.kernel.org, imx@lists.linux.dev,
	 linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	James Clark <james.clark@linaro.org>
Subject: [PATCH 09/14] spi: spi-fsl-dspi: Reinitialize DSPI regs after resuming for S32G
Date: Fri, 09 May 2025 12:05:56 +0100	[thread overview]
Message-ID: <20250509-james-nxp-spi-v1-9-32bfcd2fea11@linaro.org> (raw)
In-Reply-To: <20250509-james-nxp-spi-v1-0-32bfcd2fea11@linaro.org>

From: Larisa Grigore <larisa.grigore@nxp.com>

After resuming, DSPI registers (MCR and SR) need to be reinitialized for
S32G platforms.

Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: James Clark <james.clark@linaro.org>
---
 drivers/spi/spi-fsl-dspi.c | 73 +++++++++++++++++++++++++---------------------
 1 file changed, 40 insertions(+), 33 deletions(-)

diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 50cec3b94322..0613642d769d 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -1258,6 +1258,39 @@ static const struct of_device_id fsl_dspi_dt_ids[] = {
 };
 MODULE_DEVICE_TABLE(of, fsl_dspi_dt_ids);
 
+static int dspi_init(struct fsl_dspi *dspi)
+{
+	unsigned int mcr;
+
+	/* Set idle states for all chip select signals to high */
+	mcr = SPI_MCR_PCSIS(GENMASK(dspi->ctlr->max_native_cs - 1, 0));
+
+	if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE)
+		mcr |= SPI_MCR_XSPI;
+	if (!spi_controller_is_target(dspi->ctlr))
+		mcr |= SPI_MCR_HOST;
+
+	regmap_write(dspi->regmap, SPI_MCR, mcr);
+	regmap_write(dspi->regmap, SPI_SR, SPI_SR_CLEAR);
+
+	switch (dspi->devtype_data->trans_mode) {
+	case DSPI_XSPI_MODE:
+		regmap_write(dspi->regmap, SPI_RSER, SPI_RSER_CMDTCFE);
+		break;
+	case DSPI_DMA_MODE:
+		regmap_write(dspi->regmap, SPI_RSER,
+			     SPI_RSER_TFFFE | SPI_RSER_TFFFD |
+			     SPI_RSER_RFDFE | SPI_RSER_RFDFD);
+		break;
+	default:
+		dev_err(&dspi->pdev->dev, "unsupported trans_mode %u\n",
+			dspi->devtype_data->trans_mode);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 #ifdef CONFIG_PM_SLEEP
 static int dspi_suspend(struct device *dev)
 {
@@ -1284,6 +1317,13 @@ static int dspi_resume(struct device *dev)
 	if (ret)
 		return ret;
 	spi_controller_resume(dspi->ctlr);
+
+	ret = dspi_init(dspi);
+	if (ret) {
+		dev_err(dev, "failed to initialize dspi during resume\n");
+		return ret;
+	}
+
 	if (dspi->irq)
 		enable_irq(dspi->irq);
 
@@ -1293,39 +1333,6 @@ static int dspi_resume(struct device *dev)
 
 static SIMPLE_DEV_PM_OPS(dspi_pm, dspi_suspend, dspi_resume);
 
-static int dspi_init(struct fsl_dspi *dspi)
-{
-	unsigned int mcr;
-
-	/* Set idle states for all chip select signals to high */
-	mcr = SPI_MCR_PCSIS(GENMASK(dspi->ctlr->max_native_cs - 1, 0));
-
-	if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE)
-		mcr |= SPI_MCR_XSPI;
-	if (!spi_controller_is_target(dspi->ctlr))
-		mcr |= SPI_MCR_HOST;
-
-	regmap_write(dspi->regmap, SPI_MCR, mcr);
-	regmap_write(dspi->regmap, SPI_SR, SPI_SR_CLEAR);
-
-	switch (dspi->devtype_data->trans_mode) {
-	case DSPI_XSPI_MODE:
-		regmap_write(dspi->regmap, SPI_RSER, SPI_RSER_CMDTCFE);
-		break;
-	case DSPI_DMA_MODE:
-		regmap_write(dspi->regmap, SPI_RSER,
-			     SPI_RSER_TFFFE | SPI_RSER_TFFFD |
-			     SPI_RSER_RFDFE | SPI_RSER_RFDFD);
-		break;
-	default:
-		dev_err(&dspi->pdev->dev, "unsupported trans_mode %u\n",
-			dspi->devtype_data->trans_mode);
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
 static int dspi_target_abort(struct spi_controller *host)
 {
 	struct fsl_dspi *dspi = spi_controller_get_devdata(host);

-- 
2.34.1


  parent reply	other threads:[~2025-05-09 11:07 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-09 11:05 [PATCH 00/14] spi: spi-fsl-dspi: DSPI support for NXP S32G platforms James Clark
2025-05-09 11:05 ` [PATCH 01/14] spi: spi-fsl-dspi: Define regmaps per device James Clark
2025-05-09 16:04   ` Vladimir Oltean
2025-05-09 11:05 ` [PATCH 02/14] spi: spi-fsl-dspi: Re-use one volatile regmap for both device types James Clark
2025-05-09 16:07   ` Vladimir Oltean
2025-05-09 11:05 ` [PATCH 03/14] spi: spi-fsl-dspi: restrict register range for regmap access James Clark
2025-05-09 14:06   ` Vladimir Oltean
2025-05-19 10:25     ` James Clark
2025-05-10  1:16   ` Mark Brown
2025-05-09 11:05 ` [PATCH 04/14] spi: spi-fsl-dspi: Add config and regmaps for S32G platforms James Clark
2025-05-09 11:05 ` [PATCH 05/14] spi: spi-fsl-dspi: Use spi_alloc_target for target James Clark
2025-05-09 11:05 ` [PATCH 06/14] spi: spi-fsl-dspi: Avoid setup_accel logic for DMA transfers James Clark
2025-05-09 11:05 ` [PATCH 07/14] spi: spi-fsl-dspi: Reset SR flags before sending a new message James Clark
2025-05-09 11:05 ` [PATCH 08/14] spi: spi-fsl-dspi: Use DMA for S32G controller in target mode James Clark
2025-05-09 11:05 ` James Clark [this message]
2025-05-09 11:05 ` [PATCH 10/14] spi: spi-fsl-dspi: Enable modified transfer protocol James Clark
2025-05-10  1:18   ` Mark Brown
2025-05-15 12:20     ` James Clark
2025-05-09 11:05 ` [PATCH 11/14] spi: spi-fsl-dspi: Halt the module after a new message transfer James Clark
2025-05-10  1:19   ` Mark Brown
2025-05-09 11:05 ` [PATCH 12/14] dt-bindings: spi: dspi: Add S32G support James Clark
2025-05-09 11:14   ` Krzysztof Kozlowski
2025-05-09 11:26     ` James Clark
2025-05-09 11:06 ` [PATCH 13/14] spi: spi-fsl-dspi: Enable support for S32G platforms James Clark
2025-05-09 11:06 ` [PATCH 14/14] arm64: dts: Add DSPI entries " James Clark
2025-05-09 11:26   ` Krzysztof Kozlowski
2025-05-09 12:54     ` Matti Vaittinen
2025-05-09 13:46       ` James Clark
2025-05-09 13:57       ` Krzysztof Kozlowski
2025-05-09 14:17 ` [PATCH 00/14] spi: spi-fsl-dspi: DSPI support for NXP " Rob Herring (Arm)

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