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Fri, 9 May 2025 06:50:23 -0400 From: Antoniu Miclaus To: , , , , , CC: Antoniu Miclaus Subject: [PATCH v5 00/10] Add support for AD4080 ADC Date: Fri, 9 May 2025 13:50:09 +0300 Message-ID: <20250509105019.8887-1-antoniu.miclaus@analog.com> X-Mailer: git-send-email 2.49.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTA5MDEwMyBTYWx0ZWRfXyQF/m8IdBz4v G+zZHOZZdGcF/G6sQHHSh7yWg1OdwEhAhBrFVokrQKaEEO5Q3dxILFkpeW/zWjlXZDoYV0nc2a+ S5MtlGN8zLy9eHkJ/TcgI1yC80dmh6m5yj9Tntyors8ny+GUxuK4zc00LU48pF9gAxcP/Fw9uWE fmafw0REkYC9/5iNi8h5pRIt6LZdTPyTKaUBpzGDQAVjNxdW2Dx7xfAWUPHWdCTs3akLwYunsrN tJhaTH48Qtjy972mVEEC9hTQkghmxMSIN2ibpHuXbo1993HCX6k5gbMBU/fSe2FxV2CEMhu9lP1 1mef2vdcAtIaMTV5a9DtT4lP0z8f0JK5eMH9wmo4aEPJxR2Mm3+XSAu+DQzTkZkVcdkfPKtJWk6 B6XSB/+tiSt0/KGOtpCVSuDTghgYh0AiBEyBSM4LGi7IBn0ZFQDVLaTmoyzGvsO8HLh2cgP+ X-Proofpoint-ORIG-GUID: a-J5GaWMjrM8wXiYqRa0SZDvp-sqgo_j X-Authority-Analysis: v=2.4 cv=UJbdHDfy c=1 sm=1 tr=0 ts=681dddf8 cx=c_pps a=PpDZqlmH/M8setHirZLBMw==:117 a=PpDZqlmH/M8setHirZLBMw==:17 a=dt9VzEwgFbYA:10 a=HubKl35eoKcbRmig0ccA:9 X-Proofpoint-GUID: a-J5GaWMjrM8wXiYqRa0SZDvp-sqgo_j X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-09_04,2025-05-08_04,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 suspectscore=0 phishscore=0 adultscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 malwarescore=0 mlxlogscore=999 mlxscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2505090103 The AD4080 is a high-speed, low noise, low distortion, 20-bit, Easy Drive, successive approximation register (SAR) analog-to-digital converter (ADC). Maintaining high performance (signal-to-noise and distortion (SINAD) ratio > 90 dBFS) at signal frequencies in excess of 1 MHz enables the AD4080 to service a wide variety of precision, wide bandwidth data acquisition applications. This driver aims to be extended in the future to support multiple parts that are not released yet: AD4081 AD4082 AD4083 AD4084 AD4085 AD4086 AD4087 AD4088 Antoniu Miclaus (10): iio: backend: add support for filter config iio: backend: add support for data alignment iio: backend: add support for number of lanes dt-bindings: iio: adc: add ad408x axi variant iio: adc: adi-axi-adc: add filter type config iio: adc: adi-axi-adc: add data align process iio: adc: adi-axi-adc: add num lanes support dt-bindings: iio: adc: add ad4080 iio: adc: ad4080: add driver support Documetation: ABI: add sinc1 and sinc5+pf1 filter Documentation/ABI/testing/sysfs-bus-iio | 3 + .../bindings/iio/adc/adi,ad4080.yaml | 96 +++ .../bindings/iio/adc/adi,axi-adc.yaml | 2 + MAINTAINERS | 8 + drivers/iio/adc/Kconfig | 14 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/ad4080.c | 575 ++++++++++++++++++ drivers/iio/adc/adi-axi-adc.c | 77 +++ drivers/iio/industrialio-backend.c | 58 ++ include/linux/iio/backend.h | 19 + 10 files changed, 853 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml create mode 100644 drivers/iio/adc/ad4080.c -- 2.49.0