From: Jonathan Cameron <jic23@kernel.org>
To: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
Cc: robh@kernel.org, krzysztof.kozlowski@linaro.org,
krzk+dt@kernel.org, conor+dt@kernel.org, agross@kernel.org,
andersson@kernel.org, lumag@kernel.org,
dmitry.baryshkov@oss.qualcomm.com, konradybcio@kernel.org,
daniel.lezcano@linaro.org, sboyd@kernel.org, amitk@kernel.org,
thara.gopinath@gmail.com, lee@kernel.org, rafael@kernel.org,
subbaraman.narayanamurthy@oss.qualcomm.com,
david.collins@oss.qualcomm.com,
anjelique.melendez@oss.qualcomm.com, quic_kamalw@quicinc.com,
rui.zhang@intel.com, lukasz.luba@arm.com,
devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, cros-qcom-dts-watchers@chromium.org,
quic_skakitap@quicinc.com, neil.armstrong@linaro.org,
stephan.gerhold@linaro.org
Subject: Re: [PATCH V6 5/5] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring
Date: Sun, 11 May 2025 14:11:20 +0100 [thread overview]
Message-ID: <20250511141120.58941a45@jic23-huawei> (raw)
In-Reply-To: <20250509110959.3384306-6-jishnu.prakash@oss.qualcomm.com>
On Fri, 9 May 2025 16:39:59 +0530
Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> wrote:
> Add support for ADC_TM part of PMIC5 Gen3.
>
> This is an auxiliary driver under the Gen3 ADC driver, which implements the
> threshold setting and interrupt generating functionalities of QCOM ADC_TM
> drivers, used to support thermal trip points.
>
> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
Hi Jishnu,
A few minor things inline.
Jonathan
> diff --git a/drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c b/drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c
> new file mode 100644
> index 000000000000..c63822635f10
> --- /dev/null
> +++ b/drivers/thermal/qcom/qcom-spmi-adc-tm5-gen3.c
> +static int adc_tm5_register_tzd(struct adc_tm5_gen3_chip *adc_tm5)
> +{
> + unsigned int i, channel;
> + struct thermal_zone_device *tzd;
> +
> + for (i = 0; i < adc_tm5->nchannels; i++) {
> + channel = V_CHAN(adc_tm5->chan_props[i].common_props);
> + tzd = devm_thermal_of_zone_register(adc_tm5->dev, channel,
> + &adc_tm5->chan_props[i],
> + &adc_tm_ops);
> +
> + if (IS_ERR(tzd)) {
> + if (PTR_ERR(tzd) == -ENODEV) {
> + dev_warn(adc_tm5->dev,
> + "thermal sensor on channel %d is not used\n",
> + channel);
> + continue;
> + }
> + return dev_err_probe(adc_tm5->dev, PTR_ERR(tzd),
> + "Error registering TZ zone:%ld for channel:%d\n",
> + PTR_ERR(tzd), channel);
> + }
> + adc_tm5->chan_props[i].tzd = tzd;
> + devm_thermal_add_hwmon_sysfs(adc_tm5->dev, tzd);
Can fail so unusual not to see an error check. Add a comment if intended.
> + }
> + return 0;
> +}
> +
> +static int adc_tm5_probe(struct auxiliary_device *aux_dev,
> + const struct auxiliary_device_id *id)
> +{
> + struct adc_tm5_gen3_chip *adc_tm5;
> + struct tm5_aux_dev_wrapper *aux_dev_wrapper;
> + struct device *dev = &aux_dev->dev;
> + int i, ret;
> +
> + adc_tm5 = devm_kzalloc(&aux_dev->dev, sizeof(*adc_tm5), GFP_KERNEL);
Use dev
> + if (!adc_tm5)
> + return -ENOMEM;
> +
> + aux_dev_wrapper = container_of(aux_dev, struct tm5_aux_dev_wrapper,
> + aux_dev);
> +
> + adc_tm5->dev = dev;
> + adc_tm5->dev_data = aux_dev_wrapper->dev_data;
> + adc_tm5->nchannels = aux_dev_wrapper->n_tm_channels;
> + adc_tm5->chan_props = devm_kcalloc(adc_tm5->dev, aux_dev_wrapper->n_tm_channels,
Might as well use dev here too.
> + sizeof(*adc_tm5->chan_props), GFP_KERNEL);
> + if (!adc_tm5->chan_props)
> + return -ENOMEM;
> +
> + for (i = 0; i < adc_tm5->nchannels; i++) {
> + adc_tm5->chan_props[i].common_props = aux_dev_wrapper->tm_props[i];
> + adc_tm5->chan_props[i].timer = MEAS_INT_1S;
> + adc_tm5->chan_props[i].sdam_index = (i + 1) / 8;
> + adc_tm5->chan_props[i].tm_chan_index = (i + 1) % 8;
> + adc_tm5->chan_props[i].chip = adc_tm5;
> + }
> +
> + ret = devm_add_action_or_reset(adc_tm5->dev, adc5_gen3_disable, adc_tm5);
> + if (ret)
> + return ret;
> +
> + INIT_WORK(&adc_tm5->tm_handler_work, tm_handler_work);
> +
> + /*
> + * Skipping first SDAM IRQ as it is requested in parent driver.
> + * If there is a TM violation on that IRQ, the parent driver calls
> + * the notifier (tm_event_notify) exposed from this driver to handle it.
> + */
> + for (i = 1; i < adc_tm5->dev_data->num_sdams; i++) {
> + ret = devm_request_threaded_irq(adc_tm5->dev,
> + adc_tm5->dev_data->base[i].irq,
> + NULL, adctm5_gen3_isr, IRQF_ONESHOT,
> + adc_tm5->dev_data->base[i].irq_name,
> + adc_tm5);
> + if (ret < 0)
> + return ret;
> + }
> +
> + /*
> + * This drvdata is only used in the function (adctm_event_handler)
> + * called by parent ADC driver in case of TM violation on the first SDAM.
> + */
> + auxiliary_set_drvdata(aux_dev, adc_tm5);
> +
> + ret = devm_add_action(adc_tm5->dev, adc5_gen3_clear_work, adc_tm5);
I'd add a comment on what this is undoing as normally devm clean up matches
something being started and there is no obvious sign of what that is here.
> + if (ret)
> + return ret;
> +
> + ret = adc_tm5_register_tzd(adc_tm5);
return adc_tm5...
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +static int __init adctm5_init_module(void)
> +{
> + return auxiliary_driver_register(&adctm5gen3_auxiliary_drv.adrv);
> +}
> +
> +static void __exit adctm5_exit_module(void)
> +{
> + auxiliary_driver_unregister(&adctm5gen3_auxiliary_drv.adrv);
> +}
> +
> +module_init(adctm5_init_module);
> +module_exit(adctm5_exit_module);
module_auxiliary_driver() not work for some reason?
> +
> +MODULE_DESCRIPTION("SPMI PMIC Thermal Monitor ADC driver");
> +MODULE_LICENSE("GPL");
> +MODULE_IMPORT_NS("QCOM_SPMI_ADC5_GEN3");
next prev parent reply other threads:[~2025-05-11 13:11 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-09 11:09 [PATCH V6 0/5] Add support for QCOM SPMI PMIC5 Gen3 ADC Jishnu Prakash
2025-05-09 11:09 ` [PATCH V6 1/5] dt-bindings: iio/adc: Move QCOM ADC bindings to iio/adc folder Jishnu Prakash
2025-05-11 12:21 ` Jonathan Cameron
2025-05-09 11:09 ` [PATCH V6 2/5] dt-bindings: iio: adc: Split out QCOM VADC channel properties Jishnu Prakash
2025-05-11 12:24 ` Jonathan Cameron
2025-05-09 11:09 ` [PATCH V6 3/5] dt-bindings: iio: adc: Add support for QCOM PMIC5 Gen3 ADC Jishnu Prakash
2025-05-09 14:35 ` neil.armstrong
2025-06-24 13:28 ` Jishnu Prakash
2025-05-11 12:30 ` Jonathan Cameron
2025-05-09 11:09 ` [PATCH V6 4/5] " Jishnu Prakash
2025-05-09 15:40 ` neil.armstrong
2025-05-11 13:04 ` Jonathan Cameron
2025-06-24 13:28 ` Jishnu Prakash
2025-06-28 16:31 ` Jonathan Cameron
2025-07-10 6:44 ` Jishnu Prakash
2025-07-10 12:49 ` Konrad Dybcio
2025-07-13 13:31 ` Jonathan Cameron
2025-07-17 6:04 ` Jishnu Prakash
2025-05-09 11:09 ` [PATCH V6 5/5] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring Jishnu Prakash
2025-05-09 15:21 ` neil.armstrong
2025-05-11 13:11 ` Jonathan Cameron [this message]
2025-06-24 13:28 ` Jishnu Prakash
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