[PATCH v2 2/6] arm64: dts: rockchip: move reset to dedicated eth-phy node on ringneck

Heiko Stuebner
2025-05-13T15:02:59Z

Using snps,reset-* properties to handle the ethernet-phy resets is
deprecated and instead a real phy node should be used.

Move the Ringneck phy-reset properties to such a node

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
---
.../boot/dts/rockchip/px30-ringneck.dtsi | 22 ++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
index 142244d52706..ab232e5c7ad6 100644
--- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
@@ -83,9 +83,7 @@ &emmc {

/* On-module TI DP83825I PHY but no connector, enable in carrierboard */
&gmac {
- snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 50000 50000>;
+ phy-handle = <&dp83825>;
phy-supply = <&vcc_3v3>;
clock_in_out = "output";
};
@@ -344,6 +342,18 @@ &io_domains {
status = "okay";
};

+&mdio {
+ dp83825: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0x0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&phy_rst>;
+ reset-assert-us = <50000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
+ };
+};
+
&pinctrl {
emmc {
emmc_reset: emmc-reset {
@@ -351,6 +361,12 @@ emmc_reset: emmc-reset {
};
};

+ ethernet {
+ phy_rst: phy-rst {
+ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
leds {
module_led_pin: module-led-pin {
rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
--
2.47.2