From: Conor Dooley <conor@kernel.org>
To: aleksa.paunovic@htecgroup.com
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org,
Djordje Todorovic <djordje.todorovic@htecgroup.com>
Subject: Re: [PATCH v4 1/2] dt-bindings: timer: mti,gcru
Date: Wed, 14 May 2025 16:55:22 +0100 [thread overview]
Message-ID: <20250514-shaping-strive-3041294b6c70@spud> (raw)
In-Reply-To: <20250514-riscv-time-mmio-v4-1-cb0cf2922d66@htecgroup.com>
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On Wed, May 14, 2025 at 10:51:50AM +0200, Aleksa Paunovic via B4 Relay wrote:
> From: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
>
> Add dt-bindings for the GCR.U memory mapped timer device for RISC-V
> platforms. The GCR.U memory region contains shadow copies of the RISC-V
> mtime register and the hrtime Global Configuration Register.
>
> Signed-off-by: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
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next prev parent reply other threads:[~2025-05-14 15:55 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-14 8:51 [PATCH v4 0/2] Use GCR.U timer device as clocksource Aleksa Paunovic via B4 Relay
2025-05-14 8:51 ` [PATCH v4 1/2] dt-bindings: timer: mti,gcru Aleksa Paunovic via B4 Relay
2025-05-14 15:55 ` Conor Dooley [this message]
2025-05-14 8:51 ` [PATCH v4 2/2] Allow for riscv-clock to pick up mmio address Aleksa Paunovic via B4 Relay
2025-05-15 1:20 ` kernel test robot
2025-05-20 0:40 ` kernel test robot
2025-05-21 10:43 ` Alexandre Ghiti
2025-06-04 11:25 ` Aleksa Paunovic
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