* [PATCH v2 1/5] ARM: dts: vt8500: Add node address and reg in CPU nodes
2025-05-15 19:38 [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850 Alexey Charkov
@ 2025-05-15 19:38 ` Alexey Charkov
2025-05-15 19:38 ` [PATCH v2 2/5] ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size Alexey Charkov
` (5 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Alexey Charkov @ 2025-05-15 19:38 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Alexey Charkov
Adjust CPU nodes according to current guidelines, including address
and reg. Set #address-cells accordingly.
Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
arch/arm/boot/dts/vt8500/vt8500.dtsi | 5 +++--
arch/arm/boot/dts/vt8500/wm8505.dtsi | 5 +++--
arch/arm/boot/dts/vt8500/wm8650.dtsi | 5 +++--
arch/arm/boot/dts/vt8500/wm8750.dtsi | 5 +++--
4 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/vt8500/vt8500.dtsi b/arch/arm/boot/dts/vt8500/vt8500.dtsi
index d1dd37220d41becece5d24fbb19aa71b01723e35..3cd86941db90c08ae4fbd3e0b1b079623bce28a9 100644
--- a/arch/arm/boot/dts/vt8500/vt8500.dtsi
+++ b/arch/arm/boot/dts/vt8500/vt8500.dtsi
@@ -11,12 +11,13 @@ / {
compatible = "via,vt8500";
cpus {
- #address-cells = <0>;
+ #address-cells = <1>;
#size-cells = <0>;
- cpu {
+ cpu@0 {
device_type = "cpu";
compatible = "arm,arm926ej-s";
+ reg = <0x0>;
};
};
diff --git a/arch/arm/boot/dts/vt8500/wm8505.dtsi b/arch/arm/boot/dts/vt8500/wm8505.dtsi
index 2b1819f0c5412648a83cd3eeb495f68d2e4100ef..34e55b8c2c8b20fe2598ccc9699551dc9c8e69a6 100644
--- a/arch/arm/boot/dts/vt8500/wm8505.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8505.dtsi
@@ -11,12 +11,13 @@ / {
compatible = "wm,wm8505";
cpus {
- #address-cells = <0>;
+ #address-cells = <1>;
#size-cells = <0>;
- cpu {
+ cpu@0 {
device_type = "cpu";
compatible = "arm,arm926ej-s";
+ reg = <0x0>;
};
};
diff --git a/arch/arm/boot/dts/vt8500/wm8650.dtsi b/arch/arm/boot/dts/vt8500/wm8650.dtsi
index 042eec78c085d19fc97d7f0f9721399c0716ff74..b42c77f99c006af31d4be8bbb985f536244edf8c 100644
--- a/arch/arm/boot/dts/vt8500/wm8650.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8650.dtsi
@@ -11,12 +11,13 @@ / {
compatible = "wm,wm8650";
cpus {
- #address-cells = <0>;
+ #address-cells = <1>;
#size-cells = <0>;
- cpu {
+ cpu@0 {
device_type = "cpu";
compatible = "arm,arm926ej-s";
+ reg = <0x0>;
};
};
diff --git a/arch/arm/boot/dts/vt8500/wm8750.dtsi b/arch/arm/boot/dts/vt8500/wm8750.dtsi
index 56342aa1d993a43e7ee766f93151c6d456496262..68e325163061b11e52027fbf291953a170f39469 100644
--- a/arch/arm/boot/dts/vt8500/wm8750.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8750.dtsi
@@ -11,12 +11,13 @@ / {
compatible = "wm,wm8750";
cpus {
- #address-cells = <0>;
+ #address-cells = <1>;
#size-cells = <0>;
- cpu {
+ cpu@0 {
device_type = "cpu";
compatible = "arm,arm1176jzf";
+ reg = <0x0>;
};
};
--
2.49.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 2/5] ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size
2025-05-15 19:38 [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850 Alexey Charkov
2025-05-15 19:38 ` [PATCH v2 1/5] ARM: dts: vt8500: Add node address and reg in CPU nodes Alexey Charkov
@ 2025-05-15 19:38 ` Alexey Charkov
2025-05-15 19:38 ` [PATCH v2 3/5] ARM: dts: vt8500: Use generic node name for the SD/MMC controller Alexey Charkov
` (4 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Alexey Charkov @ 2025-05-15 19:38 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Alexey Charkov
VIA/WonderMedia SoCs don't have on-chip memory, so their memory
nodes are better placed in per-board dts rather than per-SoC dtsi.
Move them accordingly, and also add correct node addresses and
sizes for each of the boards. Some boards were also available with
more memory than included in this commit - those would need a
separate DT or an appropriate kernel cmdline argument to reflect it,
as the bootloader on these devices doesn't handle DT at all nor does
it any runtime discovery of available memory size.
Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
arch/arm/boot/dts/vt8500/vt8500-bv07.dts | 5 +++++
arch/arm/boot/dts/vt8500/vt8500.dtsi | 5 -----
arch/arm/boot/dts/vt8500/wm8505-ref.dts | 5 +++++
arch/arm/boot/dts/vt8500/wm8505.dtsi | 5 -----
arch/arm/boot/dts/vt8500/wm8650-mid.dts | 5 +++++
arch/arm/boot/dts/vt8500/wm8650.dtsi | 5 -----
arch/arm/boot/dts/vt8500/wm8750-apc8750.dts | 5 +++++
arch/arm/boot/dts/vt8500/wm8750.dtsi | 5 -----
arch/arm/boot/dts/vt8500/wm8850-w70v2.dts | 5 +++++
arch/arm/boot/dts/vt8500/wm8850.dtsi | 5 -----
10 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/arch/arm/boot/dts/vt8500/vt8500-bv07.dts b/arch/arm/boot/dts/vt8500/vt8500-bv07.dts
index 38a2da5e2c5d64477f04e1da9d98cb97be0d95e4..c8c07c2b4acf92e977704437de88550391c8679f 100644
--- a/arch/arm/boot/dts/vt8500/vt8500-bv07.dts
+++ b/arch/arm/boot/dts/vt8500/vt8500-bv07.dts
@@ -10,6 +10,11 @@
/ {
model = "Benign BV07 Netbook";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x8000000>;
+ };
};
&fb {
diff --git a/arch/arm/boot/dts/vt8500/vt8500.dtsi b/arch/arm/boot/dts/vt8500/vt8500.dtsi
index 3cd86941db90c08ae4fbd3e0b1b079623bce28a9..30ebaaa1e5a4b53094b295570ab6e831acfb1c93 100644
--- a/arch/arm/boot/dts/vt8500/vt8500.dtsi
+++ b/arch/arm/boot/dts/vt8500/vt8500.dtsi
@@ -21,11 +21,6 @@ cpu@0 {
};
};
- memory {
- device_type = "memory";
- reg = <0x0 0x0>;
- };
-
aliases {
serial0 = &uart0;
serial1 = &uart1;
diff --git a/arch/arm/boot/dts/vt8500/wm8505-ref.dts b/arch/arm/boot/dts/vt8500/wm8505-ref.dts
index 8ce9e2ef0a81097e7143a5392ee5b42bf8028ec1..d4ff99c700120fbf3401335168ed88b190335005 100644
--- a/arch/arm/boot/dts/vt8500/wm8505-ref.dts
+++ b/arch/arm/boot/dts/vt8500/wm8505-ref.dts
@@ -10,6 +10,11 @@
/ {
model = "Wondermedia WM8505 Netbook";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x8000000>;
+ };
};
&fb {
diff --git a/arch/arm/boot/dts/vt8500/wm8505.dtsi b/arch/arm/boot/dts/vt8500/wm8505.dtsi
index 34e55b8c2c8b20fe2598ccc9699551dc9c8e69a6..8c99374822f65352102df83a33a1ac072127ebc1 100644
--- a/arch/arm/boot/dts/vt8500/wm8505.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8505.dtsi
@@ -21,11 +21,6 @@ cpu@0 {
};
};
- memory {
- device_type = "memory";
- reg = <0x0 0x0>;
- };
-
aliases {
serial0 = &uart0;
serial1 = &uart1;
diff --git a/arch/arm/boot/dts/vt8500/wm8650-mid.dts b/arch/arm/boot/dts/vt8500/wm8650-mid.dts
index 7977b6c1e8ebf215df210dee703e470b9159d329..bfc570e80073d5e6907978dfc5d2413e1ceb2983 100644
--- a/arch/arm/boot/dts/vt8500/wm8650-mid.dts
+++ b/arch/arm/boot/dts/vt8500/wm8650-mid.dts
@@ -10,6 +10,11 @@
/ {
model = "Wondermedia WM8650-MID Tablet";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x10000000>;
+ };
};
&fb {
diff --git a/arch/arm/boot/dts/vt8500/wm8650.dtsi b/arch/arm/boot/dts/vt8500/wm8650.dtsi
index b42c77f99c006af31d4be8bbb985f536244edf8c..2daff177979b482eac7e21ec1b17ba000ea69ef3 100644
--- a/arch/arm/boot/dts/vt8500/wm8650.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8650.dtsi
@@ -21,11 +21,6 @@ cpu@0 {
};
};
- memory {
- device_type = "memory";
- reg = <0x0 0x0>;
- };
-
aliases {
serial0 = &uart0;
serial1 = &uart1;
diff --git a/arch/arm/boot/dts/vt8500/wm8750-apc8750.dts b/arch/arm/boot/dts/vt8500/wm8750-apc8750.dts
index 136e812bc1e498d48c7fc61154bc66a48888b117..72d633bedff04401c40f4d3772fbcfe45e1c0e31 100644
--- a/arch/arm/boot/dts/vt8500/wm8750-apc8750.dts
+++ b/arch/arm/boot/dts/vt8500/wm8750-apc8750.dts
@@ -11,6 +11,11 @@
/ {
model = "VIA APC8750";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x20000000>;
+ };
};
&pinctrl {
diff --git a/arch/arm/boot/dts/vt8500/wm8750.dtsi b/arch/arm/boot/dts/vt8500/wm8750.dtsi
index 68e325163061b11e52027fbf291953a170f39469..60220d299e21101ce8102b376bec5382ef5ac0d1 100644
--- a/arch/arm/boot/dts/vt8500/wm8750.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8750.dtsi
@@ -21,11 +21,6 @@ cpu@0 {
};
};
- memory {
- device_type = "memory";
- reg = <0x0 0x0>;
- };
-
aliases {
serial0 = &uart0;
serial1 = &uart1;
diff --git a/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts b/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts
index 5d409323b10cb94a5694722de1e31cff5be390ce..eb16991a2cccf35da23c4a0a8ac2ad02665b2109 100644
--- a/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts
+++ b/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts
@@ -22,6 +22,11 @@ backlight {
brightness-levels = <0 40 60 80 100 130 190 255>;
default-brightness-level = <5>;
};
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x20000000>;
+ };
};
&fb {
diff --git a/arch/arm/boot/dts/vt8500/wm8850.dtsi b/arch/arm/boot/dts/vt8500/wm8850.dtsi
index 03e72f28d31b1cfdcfa71ede93b8943971bae4e3..1efb8989931d0dab7b946c906b50292b09fc8bb3 100644
--- a/arch/arm/boot/dts/vt8500/wm8850.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8850.dtsi
@@ -21,11 +21,6 @@ cpu@0 {
};
};
- memory {
- device_type = "memory";
- reg = <0x0 0x0>;
- };
-
aliases {
serial0 = &uart0;
serial1 = &uart1;
--
2.49.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 3/5] ARM: dts: vt8500: Use generic node name for the SD/MMC controller
2025-05-15 19:38 [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850 Alexey Charkov
2025-05-15 19:38 ` [PATCH v2 1/5] ARM: dts: vt8500: Add node address and reg in CPU nodes Alexey Charkov
2025-05-15 19:38 ` [PATCH v2 2/5] ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size Alexey Charkov
@ 2025-05-15 19:38 ` Alexey Charkov
2025-05-15 19:38 ` [PATCH v2 4/5] ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller Alexey Charkov
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Alexey Charkov @ 2025-05-15 19:38 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Alexey Charkov
Current guidelines recommend mmc@ node names, so use that instead.
Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
arch/arm/boot/dts/vt8500/wm8505.dtsi | 2 +-
arch/arm/boot/dts/vt8500/wm8650.dtsi | 2 +-
arch/arm/boot/dts/vt8500/wm8750.dtsi | 2 +-
arch/arm/boot/dts/vt8500/wm8850.dtsi | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/vt8500/wm8505.dtsi b/arch/arm/boot/dts/vt8500/wm8505.dtsi
index 8c99374822f65352102df83a33a1ac072127ebc1..915adbf6e1e0ba69643eaf51b71222316c06ecf5 100644
--- a/arch/arm/boot/dts/vt8500/wm8505.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8505.dtsi
@@ -284,7 +284,7 @@ rtc@d8100000 {
interrupts = <48>;
};
- sdhc@d800a000 {
+ mmc@d800a000 {
compatible = "wm,wm8505-sdhc";
reg = <0xd800a000 0x400>;
interrupts = <20>, <21>;
diff --git a/arch/arm/boot/dts/vt8500/wm8650.dtsi b/arch/arm/boot/dts/vt8500/wm8650.dtsi
index 2daff177979b482eac7e21ec1b17ba000ea69ef3..82eef7504364484dc88e3b439bdde905085b89e1 100644
--- a/arch/arm/boot/dts/vt8500/wm8650.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8650.dtsi
@@ -192,7 +192,7 @@ usb@d8007b00 {
interrupts = <43>;
};
- sdhc@d800a000 {
+ mmc@d800a000 {
compatible = "wm,wm8505-sdhc";
reg = <0xd800a000 0x400>;
interrupts = <20>, <21>;
diff --git a/arch/arm/boot/dts/vt8500/wm8750.dtsi b/arch/arm/boot/dts/vt8500/wm8750.dtsi
index 60220d299e21101ce8102b376bec5382ef5ac0d1..5342b7fe4ef89a50f0a95a8515dc1b70461dd7c4 100644
--- a/arch/arm/boot/dts/vt8500/wm8750.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8750.dtsi
@@ -324,7 +324,7 @@ rtc@d8100000 {
interrupts = <48>;
};
- sdhc@d800a000 {
+ mmc@d800a000 {
compatible = "wm,wm8505-sdhc";
reg = <0xd800a000 0x1000>;
interrupts = <20 21>;
diff --git a/arch/arm/boot/dts/vt8500/wm8850.dtsi b/arch/arm/boot/dts/vt8500/wm8850.dtsi
index 1efb8989931d0dab7b946c906b50292b09fc8bb3..f741a3e88d74ab4740f200b9b96201b3dc799bad 100644
--- a/arch/arm/boot/dts/vt8500/wm8850.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8850.dtsi
@@ -294,7 +294,7 @@ rtc@d8100000 {
interrupts = <48>;
};
- sdhc@d800a000 {
+ mmc@d800a000 {
compatible = "wm,wm8505-sdhc";
reg = <0xd800a000 0x1000>;
interrupts = <20 21>;
--
2.49.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 4/5] ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller
2025-05-15 19:38 [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850 Alexey Charkov
` (2 preceding siblings ...)
2025-05-15 19:38 ` [PATCH v2 3/5] ARM: dts: vt8500: Use generic node name for the SD/MMC controller Alexey Charkov
@ 2025-05-15 19:38 ` Alexey Charkov
2025-05-15 19:38 ` [PATCH v2 5/5] ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950 Alexey Charkov
` (2 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Alexey Charkov @ 2025-05-15 19:38 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Alexey Charkov
Set correct unit address of d800e400 for the via,vt8500-fb node
in vt8500.dtsi. Note that the reg property contained a correct
address, so it must have been a copy and paste error earlier.
While here, also update its node name to a generic one.
Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
arch/arm/boot/dts/vt8500/vt8500.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/vt8500/vt8500.dtsi b/arch/arm/boot/dts/vt8500/vt8500.dtsi
index 30ebaaa1e5a4b53094b295570ab6e831acfb1c93..9b87b12897922b20be83d7df686dda713bb4f098 100644
--- a/arch/arm/boot/dts/vt8500/vt8500.dtsi
+++ b/arch/arm/boot/dts/vt8500/vt8500.dtsi
@@ -122,7 +122,7 @@ usb@d8007b00 {
interrupts = <43>;
};
- fb: fb@d8050800 {
+ fb: lcd-controller@d800e400 {
compatible = "via,vt8500-fb";
reg = <0xd800e400 0x400>;
interrupts = <12>;
--
2.49.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 5/5] ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950
2025-05-15 19:38 [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850 Alexey Charkov
` (3 preceding siblings ...)
2025-05-15 19:38 ` [PATCH v2 4/5] ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller Alexey Charkov
@ 2025-05-15 19:38 ` Alexey Charkov
2025-05-21 13:28 ` [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850 Alexey Charkov
2025-06-12 15:26 ` Krzysztof Kozlowski
6 siblings, 0 replies; 10+ messages in thread
From: Alexey Charkov @ 2025-05-15 19:38 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Alexey Charkov
WonderMedia WM8850/WM8950 uses an ARM PL310 cache controller for its
L2 cache, add it.
The parameters have been deduced from vendor's U-boot environment
variables, which the downstream code uses to initialize the
controller. They set the following register values:
aux = 0x3e440000
prefetch_ctrl = 0x70000007
Their initialization code also unconditionally sets the flags
L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, so encode those too
Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
arch/arm/boot/dts/vt8500/wm8850.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/vt8500/wm8850.dtsi b/arch/arm/boot/dts/vt8500/wm8850.dtsi
index f741a3e88d74ab4740f200b9b96201b3dc799bad..58109aa05f74b67cda82b5ebd0127662e475ded6 100644
--- a/arch/arm/boot/dts/vt8500/wm8850.dtsi
+++ b/arch/arm/boot/dts/vt8500/wm8850.dtsi
@@ -18,6 +18,7 @@ cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x0>;
+ next-level-cache = <&l2_cache>;
};
};
@@ -308,5 +309,18 @@ ethernet@d8004000 {
reg = <0xd8004000 0x100>;
interrupts = <10>;
};
+
+ l2_cache: cache-controller@d9000000 {
+ compatible = "arm,pl310-cache";
+ reg = <0xd9000000 0x1000>;
+ arm,double-linefill = <1>;
+ arm,dynamic-clock-gating = <1>;
+ arm,shared-override;
+ arm,standby-mode = <1>;
+ cache-level = <2>;
+ cache-unified;
+ prefetch-data = <1>;
+ prefetch-instr = <1>;
+ };
};
};
--
2.49.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850
2025-05-15 19:38 [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850 Alexey Charkov
` (4 preceding siblings ...)
2025-05-15 19:38 ` [PATCH v2 5/5] ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950 Alexey Charkov
@ 2025-05-21 13:28 ` Alexey Charkov
2025-05-21 13:32 ` Krzysztof Kozlowski
2025-06-12 15:26 ` Krzysztof Kozlowski
6 siblings, 1 reply; 10+ messages in thread
From: Alexey Charkov @ 2025-05-21 13:28 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel
On Thu, May 15, 2025 at 11:39 PM Alexey Charkov <alchark@gmail.com> wrote:
>
> Small fixups for VT8500 related device trees to improve correctness in
> light of current guidelines.
>
> While at that, also include a DT node for the PL310 cache controller
> present in WM8850/WM8950.
>
> Signed-off-by: Alexey Charkov <alchark@gmail.com>
> ---
> Alexey Charkov (5):
> ARM: dts: vt8500: Add node address and reg in CPU nodes
> ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size
> ARM: dts: vt8500: Use generic node name for the SD/MMC controller
> ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller
> ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950
Krzysztof, could you please pick these up for 6.16?
No big deal here, but W=1 builds and DTBS_CHECK become somewhat happier.
Thanks a lot,
Alexey
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850
2025-05-21 13:28 ` [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850 Alexey Charkov
@ 2025-05-21 13:32 ` Krzysztof Kozlowski
2025-05-21 14:04 ` Alexey Charkov
0 siblings, 1 reply; 10+ messages in thread
From: Krzysztof Kozlowski @ 2025-05-21 13:32 UTC (permalink / raw)
To: Alexey Charkov, Rob Herring, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel
On 21/05/2025 15:28, Alexey Charkov wrote:
> On Thu, May 15, 2025 at 11:39 PM Alexey Charkov <alchark@gmail.com> wrote:
>>
>> Small fixups for VT8500 related device trees to improve correctness in
>> light of current guidelines.
>>
>> While at that, also include a DT node for the PL310 cache controller
>> present in WM8850/WM8950.
>>
>> Signed-off-by: Alexey Charkov <alchark@gmail.com>
>> ---
>> Alexey Charkov (5):
>> ARM: dts: vt8500: Add node address and reg in CPU nodes
>> ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size
>> ARM: dts: vt8500: Use generic node name for the SD/MMC controller
>> ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller
>> ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950
>
> Krzysztof, could you please pick these up for 6.16?
No, we are at RC7. I closed my tree two weeks ago and sent pull requests
already way too late - a week ago.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850
2025-05-21 13:32 ` Krzysztof Kozlowski
@ 2025-05-21 14:04 ` Alexey Charkov
0 siblings, 0 replies; 10+ messages in thread
From: Alexey Charkov @ 2025-05-21 14:04 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Rob Herring, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
On Wed, May 21, 2025 at 5:32 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On 21/05/2025 15:28, Alexey Charkov wrote:
> > On Thu, May 15, 2025 at 11:39 PM Alexey Charkov <alchark@gmail.com> wrote:
> >>
> >> Small fixups for VT8500 related device trees to improve correctness in
> >> light of current guidelines.
> >>
> >> While at that, also include a DT node for the PL310 cache controller
> >> present in WM8850/WM8950.
> >>
> >> Signed-off-by: Alexey Charkov <alchark@gmail.com>
> >> ---
> >> Alexey Charkov (5):
> >> ARM: dts: vt8500: Add node address and reg in CPU nodes
> >> ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size
> >> ARM: dts: vt8500: Use generic node name for the SD/MMC controller
> >> ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller
> >> ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950
> >
> > Krzysztof, could you please pick these up for 6.16?
>
> No, we are at RC7. I closed my tree two weeks ago and sent pull requests
> already way too late - a week ago.
Got it, thank you. Note taken on the expected cut-off time.
Best regards,
Alexey
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850
2025-05-15 19:38 [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850 Alexey Charkov
` (5 preceding siblings ...)
2025-05-21 13:28 ` [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850 Alexey Charkov
@ 2025-06-12 15:26 ` Krzysztof Kozlowski
6 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2025-06-12 15:26 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Conor Dooley, Alexey Charkov
Cc: linux-arm-kernel, devicetree, linux-kernel
On Thu, 15 May 2025 22:38:39 +0300, Alexey Charkov wrote:
> Small fixups for VT8500 related device trees to improve correctness in
> light of current guidelines.
>
> While at that, also include a DT node for the PL310 cache controller
> present in WM8850/WM8950.
>
>
> [...]
Applied, thanks!
[1/5] ARM: dts: vt8500: Add node address and reg in CPU nodes
https://git.kernel.org/krzk/linux-dt/c/4ce310e733d8e520e52772099ebeb980fd491cec
[2/5] ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size
https://git.kernel.org/krzk/linux-dt/c/ab46710603aba03ec6881152219ee7de27d20eff
[3/5] ARM: dts: vt8500: Use generic node name for the SD/MMC controller
https://git.kernel.org/krzk/linux-dt/c/8b37e3c425c3fa8439ec2e100521cb1e9651741e
[4/5] ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller
https://git.kernel.org/krzk/linux-dt/c/1918e51321c0c34341397644512568ac3451e416
[5/5] ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950
https://git.kernel.org/krzk/linux-dt/c/6cd594ed969d5cfc7f97029f8ca0d240637ebb8d
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
^ permalink raw reply [flat|nested] 10+ messages in thread