* [PATCH] arm64: dts: imx8mp-venice-gw74xx: update name of M2SKT_WDIS2# gpio
@ 2025-05-23 17:32 Tim Harvey
2025-05-23 18:39 ` Frank Li
0 siblings, 1 reply; 3+ messages in thread
From: Tim Harvey @ 2025-05-23 17:32 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, devicetree
Cc: imx, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Tim Harvey
The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the
W_DISABLE2# pin of the M.2 socket.
Add the iomux and a line name for this and rename the existing
m2_wdis# signal to m2_wdis1#.
Fixes: 6a5d95b06d93 ("arm64: dts: imx8mp-venice-gw74xx: add M2SKT_GPIO10 gpio configuration")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
index 6daa2313f879..f00099f0cd4e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
@@ -301,7 +301,7 @@ &gpio2 {
&gpio3 {
gpio-line-names =
"", "", "", "", "", "", "m2_rst", "",
- "", "", "", "", "", "", "m2_gpio10", "",
+ "", "", "", "", "", "", "m2_wdis2#", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
@@ -310,7 +310,7 @@ &gpio4 {
gpio-line-names =
"", "", "m2_off#", "", "", "", "", "",
"", "", "", "", "", "", "", "",
- "", "", "m2_wdis#", "", "", "", "", "",
+ "", "", "m2_wdis1#", "", "", "", "", "",
"", "", "", "", "", "", "", "rs485_en";
};
@@ -811,14 +811,14 @@ pinctrl_hog: hoggrp {
MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 0x40000040 /* DIO0 */
MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x40000040 /* DIO1 */
MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x40000040 /* M2SKT_OFF# */
- MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x40000150 /* M2SKT_WDIS# */
+ MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x40000150 /* M2SKT_WDIS1# */
MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40000040 /* M2SKT_PIN20 */
MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11 0x40000040 /* M2SKT_PIN22 */
MX8MP_IOMUXC_SD2_CLK__GPIO2_IO13 0x40000150 /* PCIE1_WDIS# */
MX8MP_IOMUXC_SD2_CMD__GPIO2_IO14 0x40000150 /* PCIE3_WDIS# */
MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18 0x40000150 /* PCIE2_WDIS# */
MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06 0x40000040 /* M2SKT_RST# */
- MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x40000040 /* M2SKT_GPIO10 */
+ MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x40000150 /* M2KST_WDIS2# */
MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x40000104 /* UART_TERM */
MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31 0x40000104 /* UART_RS485 */
MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00 0x40000104 /* UART_HALF */
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: imx8mp-venice-gw74xx: update name of M2SKT_WDIS2# gpio
2025-05-23 17:32 [PATCH] arm64: dts: imx8mp-venice-gw74xx: update name of M2SKT_WDIS2# gpio Tim Harvey
@ 2025-05-23 18:39 ` Frank Li
0 siblings, 0 replies; 3+ messages in thread
From: Frank Li @ 2025-05-23 18:39 UTC (permalink / raw)
To: Tim Harvey
Cc: linux-arm-kernel, linux-kernel, devicetree, imx, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam
On Fri, May 23, 2025 at 10:32:31AM -0700, Tim Harvey wrote:
> The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the
> W_DISABLE2# pin of the M.2 socket.
>
> Add the iomux
You have not add iomux setting, just change comments.
Rename m2_gpio10 to m2_wdis2#.
Rename m2_wdis# to m2_wdis1#.
Update related comments.
Frank
> and a line name for this and rename the existing
> m2_wdis# signal to m2_wdis1#.
>
> Fixes: 6a5d95b06d93 ("arm64: dts: imx8mp-venice-gw74xx: add M2SKT_GPIO10 gpio configuration")
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> index 6daa2313f879..f00099f0cd4e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> @@ -301,7 +301,7 @@ &gpio2 {
> &gpio3 {
> gpio-line-names =
> "", "", "", "", "", "", "m2_rst", "",
> - "", "", "", "", "", "", "m2_gpio10", "",
> + "", "", "", "", "", "", "m2_wdis2#", "",
> "", "", "", "", "", "", "", "",
> "", "", "", "", "", "", "", "";
> };
> @@ -310,7 +310,7 @@ &gpio4 {
> gpio-line-names =
> "", "", "m2_off#", "", "", "", "", "",
> "", "", "", "", "", "", "", "",
> - "", "", "m2_wdis#", "", "", "", "", "",
> + "", "", "m2_wdis1#", "", "", "", "", "",
> "", "", "", "", "", "", "", "rs485_en";
> };
>
> @@ -811,14 +811,14 @@ pinctrl_hog: hoggrp {
> MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 0x40000040 /* DIO0 */
> MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x40000040 /* DIO1 */
> MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x40000040 /* M2SKT_OFF# */
> - MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x40000150 /* M2SKT_WDIS# */
> + MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x40000150 /* M2SKT_WDIS1# */
> MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40000040 /* M2SKT_PIN20 */
> MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11 0x40000040 /* M2SKT_PIN22 */
> MX8MP_IOMUXC_SD2_CLK__GPIO2_IO13 0x40000150 /* PCIE1_WDIS# */
> MX8MP_IOMUXC_SD2_CMD__GPIO2_IO14 0x40000150 /* PCIE3_WDIS# */
> MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18 0x40000150 /* PCIE2_WDIS# */
> MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06 0x40000040 /* M2SKT_RST# */
> - MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x40000040 /* M2SKT_GPIO10 */
> + MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x40000150 /* M2KST_WDIS2# */
> MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x40000104 /* UART_TERM */
> MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31 0x40000104 /* UART_RS485 */
> MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00 0x40000104 /* UART_HALF */
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH] arm64: dts: imx8mp-venice-gw74xx: update name of M2SKT_WDIS2# gpio
@ 2025-06-04 22:50 Tim Harvey
0 siblings, 0 replies; 3+ messages in thread
From: Tim Harvey @ 2025-06-04 22:50 UTC (permalink / raw)
To: linux-arm-kernel, linux-kernel, devicetree
Cc: imx, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Tim Harvey
The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the
W_DISABLE2# pin of the M.2 socket. Update the gpio name for consistency.
Fixes: 6a5d95b06d93 ("arm64: dts: imx8mp-venice-gw74xx: add M2SKT_GPIO10 gpio configuration")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
v2: update commit log to clarify we are just renaming a gpio
---
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
index 6daa2313f879..f00099f0cd4e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
@@ -301,7 +301,7 @@ &gpio2 {
&gpio3 {
gpio-line-names =
"", "", "", "", "", "", "m2_rst", "",
- "", "", "", "", "", "", "m2_gpio10", "",
+ "", "", "", "", "", "", "m2_wdis2#", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
@@ -310,7 +310,7 @@ &gpio4 {
gpio-line-names =
"", "", "m2_off#", "", "", "", "", "",
"", "", "", "", "", "", "", "",
- "", "", "m2_wdis#", "", "", "", "", "",
+ "", "", "m2_wdis1#", "", "", "", "", "",
"", "", "", "", "", "", "", "rs485_en";
};
@@ -811,14 +811,14 @@ pinctrl_hog: hoggrp {
MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 0x40000040 /* DIO0 */
MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x40000040 /* DIO1 */
MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x40000040 /* M2SKT_OFF# */
- MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x40000150 /* M2SKT_WDIS# */
+ MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x40000150 /* M2SKT_WDIS1# */
MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40000040 /* M2SKT_PIN20 */
MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11 0x40000040 /* M2SKT_PIN22 */
MX8MP_IOMUXC_SD2_CLK__GPIO2_IO13 0x40000150 /* PCIE1_WDIS# */
MX8MP_IOMUXC_SD2_CMD__GPIO2_IO14 0x40000150 /* PCIE3_WDIS# */
MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18 0x40000150 /* PCIE2_WDIS# */
MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06 0x40000040 /* M2SKT_RST# */
- MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x40000040 /* M2SKT_GPIO10 */
+ MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x40000150 /* M2KST_WDIS2# */
MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x40000104 /* UART_TERM */
MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31 0x40000104 /* UART_RS485 */
MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00 0x40000104 /* UART_HALF */
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
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2025-05-23 18:39 ` Frank Li
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