From: Wei Fang <wei.fang@nxp.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, Frank.Li@nxp.com
Cc: devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 3/3] arm64: dts: imx95: add SMMU support for NETC
Date: Wed, 28 May 2025 16:34:33 +0800 [thread overview]
Message-ID: <20250528083433.3861625-4-wei.fang@nxp.com> (raw)
In-Reply-To: <20250528083433.3861625-1-wei.fang@nxp.com>
The i.MX95 NETC supports SMMU, so add SMMU support.
Signed-off-by: Wei Fang <wei.fang@nxp.com>
---
arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts | 8 ++++++++
arch/arm64/boot/dts/freescale/imx95.dtsi | 8 ++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
index 9f4d0899a94d..e9a5fb36f5d0 100644
--- a/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
@@ -494,6 +494,14 @@ &netc_bus0 {
<0x60 &its 0x66 0x1>, //ENETC1 VF1
<0x80 &its 0x64 0x1>, //ENETC2 PF
<0xc0 &its 0x67 0x1>;
+ iommu-map = <0x0 &smmu 0x20 0x1>,
+ <0x10 &smmu 0x21 0x1>,
+ <0x20 &smmu 0x22 0x1>,
+ <0x40 &smmu 0x23 0x1>,
+ <0x50 &smmu 0x25 0x1>,
+ <0x60 &smmu 0x26 0x1>,
+ <0x80 &smmu 0x24 0x1>,
+ <0xc0 &smmu 0x27 0x1>;
};
&netc_emdio {
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 632631a29112..32a91d7b51e5 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -1861,6 +1861,14 @@ netc_bus0: pcie@4ca00000 {
<0x90 &its 0x65 0x1>, //ENETC2 VF0
<0xa0 &its 0x66 0x1>, //ENETC2 VF1
<0xc0 &its 0x67 0x1>; //NETC Timer
+ iommu-map = <0x0 &smmu 0x20 0x1>,
+ <0x10 &smmu 0x21 0x1>,
+ <0x20 &smmu 0x22 0x1>,
+ <0x40 &smmu 0x23 0x1>,
+ <0x80 &smmu 0x24 0x1>,
+ <0x90 &smmu 0x25 0x1>,
+ <0xa0 &smmu 0x26 0x1>,
+ <0xc0 &smmu 0x27 0x1>;
/* ENETC0~2 and Timer BAR0 - non-prefetchable memory */
ranges = <0x82000000 0x0 0x4cc00000 0x0 0x4cc00000 0x0 0xe0000
/* Timer BAR2 - prefetchable memory */
--
2.34.1
next prev parent reply other threads:[~2025-05-28 8:54 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-28 8:34 [PATCH 0/3] update NETC node of i.MX95 Wei Fang
2025-05-28 8:34 ` [PATCH 1/3] arm64: dts: imx95-19x19-evk: fix the overshoot issue of NETC Wei Fang
2025-05-28 15:07 ` Frank Li
2025-05-28 8:34 ` [PATCH 2/3] arm64: dts: imx95-15x15-evk: " Wei Fang
2025-05-28 15:08 ` Frank Li
2025-05-28 8:34 ` Wei Fang [this message]
2025-05-28 15:09 ` [PATCH 3/3] arm64: dts: imx95: add SMMU support for NETC Frank Li
2025-05-29 2:43 ` Wei Fang
2025-06-25 5:05 ` [PATCH 0/3] update NETC node of i.MX95 Wei Fang
2025-06-30 3:35 ` Shawn Guo
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