From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E3CB23C8AA; Tue, 3 Jun 2025 16:01:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748966516; cv=none; b=C94KWJVLm5qk0UQ0XBJbSD2uqWqTB/ix741NlroLuFB8EB6A5tScl993/YVoJXC+rIbHMfkOrZKFNMWjJyuj0VabBduNWsM3yYSq5D7LNHVYhL/C04el9d1NVTduSnsoZQK5quffqdLB0ccH9V1bzKmyL0/7LXwsiV8FVzy6JhM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748966516; c=relaxed/simple; bh=9fmqYUcVPdPRnM8XfFQcxXImysQ44UM2JtaMXqYVC2w=; h=Date:From:To:CC:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=lN/rGMTYVK38TXH9OSVpytZWr+fPM/Y3M++9bHgjwUWcFwktScPqTA40sX1VYmsVTZ7hAqoGEi216qFr5QTDtQu7nPdpAzhz2BdY8p0AHo1OOqwPHu/Mqmh3erMm/zXS2npcbwRjm9TexH4EXwcxIzeR5uP7XcFnrk6bd7ntpFc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=Avd+XDHT; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Avd+XDHT" Received: from lelvem-sh01.itg.ti.com ([10.180.77.71]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 553G1mhQ510791; Tue, 3 Jun 2025 11:01:48 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1748966508; bh=0lYSal3GcLPOQfw4qEh69xNQYPJhEpOr8ui06S4slnE=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=Avd+XDHTrY0/zOX1CeCoQt0XfNmtcLHzvHkPTR3CxII5xG4AJeVtqAP1az0K8c6wn ZwTjjluDv03dLCE069CMIGGnFF3VfIzr10swomSSwvbJW1twfeuuYDjwtaOIsV40qN ktLowLSeipC8ausfTp9cDy9na4xHaNjknVO1RXz8= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by lelvem-sh01.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 553G1mh73862105 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Tue, 3 Jun 2025 11:01:48 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 3 Jun 2025 11:01:47 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 3 Jun 2025 11:01:47 -0500 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 553G1l0L667428; Tue, 3 Jun 2025 11:01:47 -0500 Date: Tue, 3 Jun 2025 11:01:47 -0500 From: Nishanth Menon To: Udit Kumar CC: , , , , , , , , Subject: Re: [RESEND PATCH] arm64: dts: ti: k3-j784s4-mcu-wakeup: Configure wkup_uart0 with clock settings Message-ID: <20250603160147.47orn74obh2lz3qm@rethink> References: <20250603042448.783956-1-u-kumar1@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20250603042448.783956-1-u-kumar1@ti.com> X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea On 09:54-20250603, Udit Kumar wrote: > From: Bhavya Kapoor > > This commit adds the assigned-clocks and assigned-clock-parents > properties for wkup_uart0 in J784S4. Specifically, the assigned-clocks > property is set to reference the clock identified by > "wkup_usart_mcupll_bypass_out0", ensuring the UART operates with the > correct clock source. > > The assigned-clock-parents property specifies "wkup_usart_clksel_out0" > as the parent clock. This configuration is critical for establishing > the proper clocking hierarchy, enabling the UART device to function > reliably across different baud rates. Please fix the commit message - not clear what specifically in the clock hierarchy does permit the multiple baud rates. > > Signed-off-by: Bhavya Kapoor You need to add your SoB. > --- > Link to v1: https://lore.kernel.org/all/20241009072056.3511346-1-b-kapoor@ti.com/ Also as Baleswar stated, the $subject needs to be fixed. > > arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi > index 52e2965a3bf5..1146bc5990ea 100644 > --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi > @@ -310,6 +310,8 @@ wkup_uart0: serial@42300000 { > interrupts = ; > clocks = <&k3_clks 397 0>; > clock-names = "fclk"; > + assigned-clocks = <&k3_clks 397 0>; > + assigned-clock-parents = <&k3_clks 397 1>; > power-domains = <&k3_pds 397 TI_SCI_PD_EXCLUSIVE>; > status = "disabled"; > }; > -- > 2.34.1 > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D