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From: Greg KH <gregkh@linuxfoundation.org>
To: Abd-Alrhman Masalkhi <abd.masalkhi@gmail.com>
Cc: arnd@arndb.de, conor+dt@kernel.org, devicetree@vger.kernel.org,
	krzk+dt@kernel.org, linux-kernel@vger.kernel.org,
	robh@kernel.org
Subject: Re: [PATCH v3 3/3] ABI: sysfs: add documentation for ST M24LR EEPROM and control interface
Date: Fri, 6 Jun 2025 18:02:30 +0200	[thread overview]
Message-ID: <2025060618-errant-audible-4c52@gregkh> (raw)
In-Reply-To: <20250606144657.3140262-1-abd.masalkhi@gmail.com>

On Fri, Jun 06, 2025 at 02:46:57PM +0000, Abd-Alrhman Masalkhi wrote:
> Hi greg,
> 
> Thanks for the feedback.
> 
> >> +                Behavior:
> >> +                  - If the password matches the internal stored value,
> >> +                    access to protected memory/configuration is granted
> >> +                  - If the password does not match the internally stored value,
> >> +                    it will fail silently
> >
> > Why is the kernel in the business of adding passwords to devices?  That
> > feels wrong, and a way to just flood the device with a "try all the
> > values" attempt if needed.
> 
> You're absolutely right, implementing password-based access in kernel
> space isn't ideal. However, this behavior is defined by the hardware
> itself. The M24LR chips require the user to "unlock" the device by writing
> a password before certain registers become writable (such as the Sector
> Security Status registors) and unfortunately, the chip does not provide
> any status or feedback to indicate whether the unlock was successful,
> which limits what the driver can safely report or validate.
> 
> >> +What:           /sys/bus/i2c/devices/<busnum>-<primary-addr>/sss<N>
> >> +Date:           2025-05-31
> >> +KernelVersion:  6.16
> >> +Contact:        Abd-Alrhman Masalkhi <abd.masalkhi@gmail.com>
> >> +Description:
> >> +                Read/write attribute representing the Sector Security Status
> >> +                (SSS) byte for EEPROM sector <N> in the M24LR chips. Each sector
> >> +                has one SSS byte, which defines I2c and RF access control via a
> >> +                combination of protection and password settings.
> >> +                Format:
> >> +                  - Read: returns a 8-bit hexadecimal value followed by a
> >> +                          newline
> >> +                  - Write: requires exactly one or two hexadecimal digits
> >> +                      - No "0x" prefix, whitespace, or trailing newline
> >> +                      - Case-insensitive
> >> +
> >> +                Notes:
> >> +                  - Refer to the M24LR chip datasheet for full bit definitions
> >> +                    and usage
> >> +                  - Write access requires prior password authentication in I2C
> >> +                    mode
> >
> > How "deep" does this sysfs tree get here?  This feels like the wrong api
> > for read/write to the device, just do it with a single binary file if
> > you really want a "passthrough" way to get to the hardware.
> 
> The depth of the sysfs tree depends on the M24LR variant. For example,
> the M24LR04E-R has 4 sectors, resulting in 4 entries: sss0 through sss3.
> 
> I understand the concern about exposing multiple sysfs entries. The
> reason for this design is that each sector has its own SSS byte, and
> separating them helps reflect the per-sector nature of the access
> control. That said, I'm open to refactoring this to expose the SSS
> area via a single binary file if that's more in line with expected
> kernel interfaces.

Who and what is going to be talking to this device through this
interface?  Is this unique and special to ONLY this one chip/device or
does it fit in with all other types of this device (i.e. eeproms)?  You
can't create a userspace api without actually having a user at all, so
if there is no userspace code using this, why even have this?

thanks,

greg k-h

  reply	other threads:[~2025-06-06 16:02 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-06 12:06 [PATCH v3 0/3] Add support for STMicroelectronics M24LR EEPROM/NFC chips Abd-Alrhman Masalkhi
2025-06-06 12:06 ` [PATCH v3 1/3] dt-bindings: eeprom: Add ST M24LR support Abd-Alrhman Masalkhi
2025-06-06 13:10   ` Krzysztof Kozlowski
2025-06-06 15:06     ` Abd-Alrhman Masalkhi
2025-06-06 12:06 ` [PATCH v3 2/3] misc: add driver for ST M24LR series RFID/NFC EEPROM chips Abd-Alrhman Masalkhi
2025-06-06 12:19   ` Greg KH
2025-06-06 13:38     ` Abd-Alrhman Masalkhi
2025-06-06 12:25   ` Greg KH
2025-06-06 14:24     ` Abd-Alrhman Masalkhi
2025-06-06 15:58       ` Greg KH
2025-06-07 11:33   ` kernel test robot
2025-06-06 12:06 ` [PATCH v3 3/3] ABI: sysfs: add documentation for ST M24LR EEPROM and control interface Abd-Alrhman Masalkhi
2025-06-06 12:28   ` Greg KH
2025-06-06 14:46     ` Abd-Alrhman Masalkhi
2025-06-06 16:02       ` Greg KH [this message]
2025-06-07  9:18         ` [PATCH v3 1/3] dt-bindings: eeprom: Add ST M24LR support Abd-Alrhman Masalkhi
2025-06-07  9:25         ` [PATCH v3 3/3] ABI: sysfs: add documentation for ST M24LR EEPROM and control interface Abd-Alrhman Masalkhi

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