From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Abhinav Kumar <quic_abhinavk@quicinc.com>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Krishna Manikandan <quic_mkrishn@quicinc.com>,
Jonathan Marek <jonathan@marek.ca>,
Kuogee Hsieh <quic_khsieh@quicinc.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Dmitry Baryshkov <lumag@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Rob Clark <robin.clark@oss.qualcomm.com>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
linux-clk@vger.kernel.org, Abel Vesa <abel.vesa@linaro.org>,
Srinivas Kandagatla <srini@kernel.org>,
Rob Clark <robin.clark@oss.qualcomm.com>
Subject: [PATCH v6 02/17] dt-bindings: display/msm: dsi-controller-main: Add SM8750
Date: Tue, 10 Jun 2025 16:05:40 +0200 [thread overview]
Message-ID: <20250610-b4-sm8750-display-v6-2-ee633e3ddbff@linaro.org> (raw)
In-Reply-To: <20250610-b4-sm8750-display-v6-0-ee633e3ddbff@linaro.org>
Add DSI controller for Qualcomm SM8750 SoC which is quite different from
previous (SM8650) generation.
It does not allow the display clock controller clocks like "byte" and
"pixel" to be reparented to DSI PHY PLLs while the DSI PHY PLL is not
configured (not prepared, rate not set). Therefore
assigned-clock-parents are not working here and driver is responsible
for reparenting clocks with proper procedure. These clocks are now
inputs to the DSI controller device.
Except that SM8750 DSI comes with several differences, new blocks and
changes in registers, making it incompatible with SM8650.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../bindings/display/msm/dsi-controller-main.yaml | 54 ++++++++++++++++++++--
1 file changed, 49 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
index 82fe95a6d9599b5799549356451278564dc070de..d4bb65c660af8ce8a6bda129a8275c579a705871 100644
--- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
@@ -42,6 +42,7 @@ properties:
- qcom,sm8450-dsi-ctrl
- qcom,sm8550-dsi-ctrl
- qcom,sm8650-dsi-ctrl
+ - qcom,sm8750-dsi-ctrl
- const: qcom,mdss-dsi-ctrl
- enum:
- qcom,dsi-ctrl-6g-qcm2290
@@ -70,11 +71,11 @@ properties:
- mnoc:: MNOC clock
- pixel:: Display pixel clock.
minItems: 3
- maxItems: 9
+ maxItems: 12
clock-names:
minItems: 3
- maxItems: 9
+ maxItems: 12
phys:
maxItems: 1
@@ -109,7 +110,8 @@ properties:
minItems: 2
maxItems: 4
description: |
- Parents of "byte" and "pixel" for the given platform.
+ For DSI on SM8650 and older: parents of "byte" and "pixel" for the given
+ platform.
For DSIv2 platforms this should contain "byte", "esc", "src" and
"pixel_src" clocks.
@@ -218,8 +220,6 @@ required:
- clocks
- clock-names
- phys
- - assigned-clocks
- - assigned-clock-parents
- ports
allOf:
@@ -244,6 +244,9 @@ allOf:
- const: byte
- const: pixel
- const: core
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
- if:
properties:
@@ -266,6 +269,9 @@ allOf:
- const: byte
- const: pixel
- const: core
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
- if:
properties:
@@ -288,6 +294,9 @@ allOf:
- const: pixel
- const: core
- const: core_mmss
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
- if:
properties:
@@ -309,6 +318,9 @@ allOf:
- const: core_mmss
- const: pixel
- const: core
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
- if:
properties:
@@ -346,6 +358,35 @@ allOf:
- const: core
- const: iface
- const: bus
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sm8750-dsi-ctrl
+ then:
+ properties:
+ clocks:
+ minItems: 12
+ maxItems: 12
+ clock-names:
+ items:
+ - const: byte
+ - const: byte_intf
+ - const: pixel
+ - const: core
+ - const: iface
+ - const: bus
+ - const: dsi_pll_pixel
+ - const: dsi_pll_byte
+ - const: esync
+ - const: osc
+ - const: byte_src
+ - const: pixel_src
- if:
properties:
@@ -369,6 +410,9 @@ allOf:
- const: core_mmss
- const: pixel
- const: core
+ required:
+ - assigned-clocks
+ - assigned-clock-parents
unevaluatedProperties: false
--
2.45.2
next prev parent reply other threads:[~2025-06-10 14:06 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-10 14:05 [PATCH v6 00/17] drm/msm: Add support for SM8750 Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 01/17] dt-bindings: display/msm: dsi-phy-7nm: Add SM8750 Krzysztof Kozlowski
2025-06-10 14:05 ` Krzysztof Kozlowski [this message]
2025-06-10 14:05 ` [PATCH v6 03/17] dt-bindings: display/msm: dp-controller: " Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 04/17] dt-bindings: display/msm: qcom,sm8650-dpu: " Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 05/17] dt-bindings: display/msm: qcom,sm8750-mdss: " Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 06/17] drm/msm/dsi/phy: Toggle back buffer resync after preparing PLL Krzysztof Kozlowski
2025-08-13 18:25 ` Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 07/17] drm/msm/dsi/phy: Define PHY_CMN_CTRL_0 bitfields Krzysztof Kozlowski
2025-06-10 22:23 ` Dmitry Baryshkov
2025-06-10 14:05 ` [PATCH v6 08/17] drm/msm/dsi/phy: Fix reading zero as PLL rates when unprepared Krzysztof Kozlowski
2025-06-13 13:55 ` Dmitry Baryshkov
2025-06-13 14:02 ` Krzysztof Kozlowski
2025-06-13 14:04 ` Dmitry Baryshkov
2025-06-18 8:28 ` Krzysztof Kozlowski
2025-06-18 13:07 ` Dmitry Baryshkov
2025-06-18 13:34 ` Krzysztof Kozlowski
2025-06-18 13:35 ` Krzysztof Kozlowski
2025-06-18 13:39 ` Dmitry Baryshkov
2025-06-18 13:54 ` Krzysztof Kozlowski
2025-06-18 13:58 ` Dmitry Baryshkov
2025-06-18 14:01 ` Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 09/17] drm/msm/dsi/phy_7nm: Fix missing initial VCO rate Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 10/17] drm/msm/dsi/phy: Add support for SM8750 Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 11/17] drm/msm/dsi: " Krzysztof Kozlowski
2025-06-10 22:25 ` Dmitry Baryshkov
2025-06-10 14:05 ` [PATCH v6 12/17] drm/msm/dpu: " Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 13/17] drm/msm/dpu: Consistently use u32 instead of uint32_t Krzysztof Kozlowski
2025-06-10 14:10 ` Neil Armstrong
2025-06-10 22:25 ` Dmitry Baryshkov
2025-06-10 14:05 ` [PATCH v6 14/17] drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPU Krzysztof Kozlowski
2025-06-10 14:10 ` Neil Armstrong
2025-06-11 6:21 ` Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 15/17] drm/msm/dpu: Implement CTL_PIPE_ACTIVE " Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 16/17] drm/msm/dpu: Implement LM crossbar " Krzysztof Kozlowski
2025-06-10 14:05 ` [PATCH v6 17/17] drm/msm/mdss: Add support for SM8750 Krzysztof Kozlowski
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