[PATCH] dt-bindings: arm: Convert Altera SDRAM EDAC binding to YAML

[PATCH] dt-bindings: arm: Convert Altera SDRAM EDAC binding to YAML

[Shankari Anand]

Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
.txt format to a YAML schema. This defines the compatible strings,
required properties, and a usage example.
The SDRAM EDAC controller monitors ECC errors on the memory bus and
requires access to SDR registers and an ECC interrupt line.

Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
---
 .../arm/altera/socfpga-sdram-edac.yaml        | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
new file mode 100644
index 000000000000..6e31632b09de
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera SOCFPGA SDRAM Error Detection and Correction (EDAC)
+
+maintainers:
+  - Matthew Gerlach <matthew.gerlach@altera.com>
+
+description: |
+  This describes the Altera SOCFPGA SDRAM EDAC controller which monitors
+  ECC errors from the SDRAM controller. It requires access to SDRAM
+  controller registers and an interrupt line for ECC event reporting.
+
+properties:
+  compatible:
+    enum:
+      - altr,sdram-edac
+      - altr,sdram-edac-a10
+
+  altr,sdr-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to the SDRAM system controller (SDR) syscon node.
+
+  interrupts:
+    maxItems: 1
+    description:
+      Interrupt specifier for the ECC error interrupt.
+
+required:
+  - compatible
+  - altr,sdr-syscon
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    sdramedac {
+        compatible = "altr,sdram-edac";
+        altr,sdr-syscon = <&sdr>;
+        interrupts = <0 39 4>;
+    };
+...
-- 
2.34.1

Re: [PATCH] dt-bindings: arm: Convert Altera SDRAM EDAC binding to YAML

[Matthew Gerlach]

On 6/8/25 2:48 PM, Shankari Anand wrote:
> Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
> .txt format to a YAML schema. This defines the compatible strings,
This patch should also delete the file, 
Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt.
> required properties, and a usage example.
> The SDRAM EDAC controller monitors ECC errors on the memory bus and
> requires access to SDR registers and an ECC interrupt line.
>
> Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
> ---
>   .../arm/altera/socfpga-sdram-edac.yaml        | 47 +++++++++++++++++++
>   1 file changed, 47 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> new file mode 100644
> index 000000000000..6e31632b09de
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> @@ -0,0 +1,47 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Altera SOCFPGA SDRAM Error Detection and Correction (EDAC)
> +
> +maintainers:
> +  - Matthew Gerlach <matthew.gerlach@altera.com>
> +
> +description: |
> +  This describes the Altera SOCFPGA SDRAM EDAC controller which monitors
> +  ECC errors from the SDRAM controller. It requires access to SDRAM
> +  controller registers and an interrupt line for ECC event reporting.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - altr,sdram-edac
> +      - altr,sdram-edac-a10

You are missing the following compatible:

                - altr,sdram-edac-s10

> +
> +  altr,sdr-syscon:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      Phandle to the SDRAM system controller (SDR) syscon node.
> +
> +  interrupts:
> +    maxItems: 1
> +    description:
> +      Interrupt specifier for the ECC error interrupt.

The Arria10 variant of the SDRAM EDAC actually has two interrupt lines. 
So you should have something like:

   interrupts:

     minItems: 1

     maxItems: 2

> +
> +required:
> +  - compatible
> +  - altr,sdr-syscon
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |

You should use the macros defined in

     #include <dt-bindings/interrupt-controller/arm-gic.h>

     #include <dt-bindings/interrupt-controller/irq.h>

> +    sdramedac {
> +        compatible = "altr,sdram-edac";
> +        altr,sdr-syscon = <&sdr>;
> +        interrupts = <0 39 4>;
                   interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> +    };
> +...

Matthew Gerlach

Re: [PATCH] dt-bindings: arm: Convert Altera SDRAM EDAC binding to YAML

[Krzysztof Kozlowski]

On 08/06/2025 23:48, Shankari Anand wrote:
> Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
> .txt format to a YAML schema. This defines the compatible strings,
> required properties, and a usage example.

Drop last sentence from all your patches - also other broadcom patch.
Don't state the obvious.

> The SDRAM EDAC controller monitors ECC errors on the memory bus and
> requires access to SDR registers and an ECC interrupt line.

Drop, not relevant to the commit. Anyway, place it in memory-controllers.

> 
> Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
> ---
>  .../arm/altera/socfpga-sdram-edac.yaml        | 47 +++++++++++++++++++

Where is the conversion?

>  1 file changed, 47 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> new file mode 100644
> index 000000000000..6e31632b09de
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> @@ -0,0 +1,47 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Altera SOCFPGA SDRAM Error Detection and Correction (EDAC)
> +
> +maintainers:
> +  - Matthew Gerlach <matthew.gerlach@altera.com>
> +
> +description: |
> +  This describes the Altera SOCFPGA SDRAM EDAC controller which monitors
> +  ECC errors from the SDRAM controller. It requires access to SDRAM
> +  controller registers and an interrupt line for ECC event reporting.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - altr,sdram-edac
> +      - altr,sdram-edac-a10
> +
> +  altr,sdr-syscon:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      Phandle to the SDRAM system controller (SDR) syscon node.
> +
> +  interrupts:
> +    maxItems: 1
> +    description:
> +      Interrupt specifier for the ECC error interrupt.
> +
> +required:
> +  - compatible
> +  - altr,sdr-syscon
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    sdramedac {

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation


> +        compatible = "altr,sdram-edac";
> +        altr,sdr-syscon = <&sdr>;
> +        interrupts = <0 39 4>;
> +    };
> +...


Best regards,
Krzysztof

[PATCH v2] dt-bindings: arm: Convert Altera SDRAM EDAC .txt to YAML

[Shankari Anand]

Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
.txt format to a YAML schema.

Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
---
 .../arm/altera/socfpga-sdram-edac.txt         | 15 ----
 .../arm/altera/socfpga-sdram-edac.yaml        | 76 +++++++++++++++++++
 2 files changed, 76 insertions(+), 15 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
 create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
deleted file mode 100644
index f5ad0ff69fae..000000000000
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
-The EDAC accesses a range of registers in the SDRAM controller.
-
-Required properties:
-- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
-- altr,sdr-syscon : phandle of the sdr module
-- interrupts : Should contain the SDRAM ECC IRQ in the
-	appropriate format for the IRQ controller.
-
-Example:
-	sdramedac {
-		compatible = "altr,sdram-edac";
-		altr,sdr-syscon = <&sdr>;
-		interrupts = <0 39 4>;
-	};
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
new file mode 100644
index 000000000000..535a5d66e4e3
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/edac/altr,sdram-edac.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Altera SoCFPGA SDRAM EDAC Controller
+
+maintainers:
+  - name: Dinh Nguyen
+    email: dinguyen@kernel.org
+
+description: |
+  EDAC-compatible controller for SDRAM error detection and correction on
+  Altera (Intel) SoCFPGA platforms.
+
+properties:
+  compatible:
+    oneOf:
+      - const: altr,sdram-edac
+      - const: altr,sdram-edac-a10
+      - const: altr,sdram-edac-s10
+
+  altr,sdr-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to the SDRAM system controller (SDR) syscon node.
+
+  interrupts:
+    minItems: 1
+    maxItems: 2
+    description: |
+      One or two interrupt specifiers for ECC error interrupt(s).
+      Arria 10 SoCs use two interrupt lines.
+
+required:
+  - compatible
+  - altr,sdr-syscon
+  - interrupts
+
+$nodename:
+  pattern: "^edac@[0-9a-f]+$"
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    edac@0 {
+        compatible = "altr,sdram-edac-a10";
+        altr,sdr-syscon = <&sdr>;
+        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+    };
+
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    edac@0 {
+        compatible = "altr,sdram-edac-s10";
+        altr,sdr-syscon = <&sdr>;
+        interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+    };
+
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    edac@0 {
+        compatible = "altr,sdram-edac";
+        altr,sdr-syscon = <&sdr>;
+        interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+    };
-- 
2.34.1

Re: [PATCH v2] dt-bindings: arm: Convert Altera SDRAM EDAC .txt to YAML

[Rob Herring (Arm)]

On Tue, 10 Jun 2025 13:52:20 +0530, Shankari Anand wrote:
> Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
> .txt format to a YAML schema.
> 
> Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
> ---
>  .../arm/altera/socfpga-sdram-edac.txt         | 15 ----
>  .../arm/altera/socfpga-sdram-edac.yaml        | 76 +++++++++++++++++++
>  2 files changed, 76 insertions(+), 15 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
>  create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:
./Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml:5:10: [error] string value is redundantly quoted with any quotes (quoted-strings)

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml: properties:compatible:oneOf: [{'const': 'altr,sdram-edac'}, {'const': 'altr,sdram-edac-a10'}, {'const': 'altr,sdram-edac-s10'}] should not be valid under {'items': {'propertyNames': {'const': 'const'}, 'required': ['const']}}
	hint: Use 'enum' rather than 'oneOf' + 'const' entries
	from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml: maintainers:0: {'name': 'Dinh Nguyen', 'email': 'dinguyen@kernel.org'} is not of type 'string'
	from schema $id: http://devicetree.org/meta-schemas/base.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml: '$nodename' is not one of ['$id', '$schema', 'title', 'description', 'examples', 'required', 'allOf', 'anyOf', 'oneOf', 'definitions', '$defs', 'additionalProperties', 'dependencies', 'dependentRequired', 'dependentSchemas', 'patternProperties', 'properties', 'not', 'if', 'then', 'else', 'unevaluatedProperties', 'deprecated', 'maintainers', 'select', '$ref']
	from schema $id: http://devicetree.org/meta-schemas/base.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml: $id: Cannot determine base path from $id, relative path/filename doesn't match actual path or filename
 	 $id: http://devicetree.org/schemas/edac/altr,sdram-edac.yaml
 	file: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.example.dts:27.16-32.11: Warning (unit_address_vs_reg): /example-0/edac@0: node has a unit name, but no reg or ranges property
Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.example.dts:59.16-63.11: Warning (unit_address_vs_reg): /example-1/edac@0: node has a unit name, but no reg or ranges property
Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.example.dts:90.16-94.11: Warning (unit_address_vs_reg): /example-2/edac@0: node has a unit name, but no reg or ranges property

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250610082220.273518-1-shankari.ak0208@gmail.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

[PATCH v2] dt-bindings: arm: Convert Altera SDRAM EDAC .txt to YAML

[Shankari Anand]

Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
.txt format to a YAML schema.

Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
---
 .../arm/altera/socfpga-sdram-edac.txt         | 15 ----
 .../arm/altera/socfpga-sdram-edac.yaml        | 76 +++++++++++++++++++
 2 files changed, 76 insertions(+), 15 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
 create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
deleted file mode 100644
index f5ad0ff69fae..000000000000
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
-The EDAC accesses a range of registers in the SDRAM controller.
-
-Required properties:
-- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
-- altr,sdr-syscon : phandle of the sdr module
-- interrupts : Should contain the SDRAM ECC IRQ in the
-	appropriate format for the IRQ controller.
-
-Example:
-	sdramedac {
-		compatible = "altr,sdram-edac";
-		altr,sdr-syscon = <&sdr>;
-		interrupts = <0 39 4>;
-	};
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
new file mode 100644
index 000000000000..535a5d66e4e3
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/edac/altr,sdram-edac.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Altera SoCFPGA SDRAM EDAC Controller
+
+maintainers:
+  - name: Dinh Nguyen
+    email: dinguyen@kernel.org
+
+description: |
+  EDAC-compatible controller for SDRAM error detection and correction on
+  Altera (Intel) SoCFPGA platforms.
+
+properties:
+  compatible:
+    oneOf:
+      - const: altr,sdram-edac
+      - const: altr,sdram-edac-a10
+      - const: altr,sdram-edac-s10
+
+  altr,sdr-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to the SDRAM system controller (SDR) syscon node.
+
+  interrupts:
+    minItems: 1
+    maxItems: 2
+    description: |
+      One or two interrupt specifiers for ECC error interrupt(s).
+      Arria 10 SoCs use two interrupt lines.
+
+required:
+  - compatible
+  - altr,sdr-syscon
+  - interrupts
+
+$nodename:
+  pattern: "^edac@[0-9a-f]+$"
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    edac@0 {
+        compatible = "altr,sdram-edac-a10";
+        altr,sdr-syscon = <&sdr>;
+        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+    };
+
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    edac@0 {
+        compatible = "altr,sdram-edac-s10";
+        altr,sdr-syscon = <&sdr>;
+        interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+    };
+
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    edac@0 {
+        compatible = "altr,sdram-edac";
+        altr,sdr-syscon = <&sdr>;
+        interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+    };
-- 
2.34.1

[PATCH v4] dt-bindings: arm: Convert Altera SDRAM EDAC .txt to YAML

[Shankari Anand]

Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
.txt format to a YAML schema.

Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
---
 .../arm/altera/socfpga-sdram-edac.txt         | 15 ----
 .../arm/altera/socfpga-sdram-edac.yaml        | 79 +++++++++++++++++++
 2 files changed, 79 insertions(+), 15 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
 create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
deleted file mode 100644
index f5ad0ff69fae..000000000000
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
-The EDAC accesses a range of registers in the SDRAM controller.
-
-Required properties:
-- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
-- altr,sdr-syscon : phandle of the sdr module
-- interrupts : Should contain the SDRAM ECC IRQ in the
-	appropriate format for the IRQ controller.
-
-Example:
-	sdramedac {
-		compatible = "altr,sdram-edac";
-		altr,sdr-syscon = <&sdr>;
-		interrupts = <0 39 4>;
-	};
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
new file mode 100644
index 000000000000..f41e949f8ba2
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera SoCFPGA SDRAM EDAC Controller
+
+maintainers:
+  - Matthew Gerlach <matthew.gerlach@altera.com>
+
+description: |
+  EDAC-compatible controller for SDRAM error detection and correction on
+  Altera (Intel) SoCFPGA platforms.
+
+properties:
+  compatible:
+    enum:
+      - altr,sdram-edac
+      - altr,sdram-edac-a10
+      - altr,sdram-edac-s10
+
+  altr,sdr-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: Phandle to the SDRAM system controller (SDR) syscon node.
+
+  interrupts:
+    minItems: 1
+    maxItems: 2
+    description: |
+      One or two interrupt specifiers for ECC error interrupt(s).
+      Arria 10 SoCs use two interrupt lines.
+
+  reg:
+    maxItems: 1
+    description: Memory-mapped base address and size of the SDRAM EDAC controller.
+
+required:
+  - compatible
+  - altr,sdr-syscon
+  - interrupts
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    edac@ffb90000 {
+    compatible = "altr,sdram-edac-a10";
+    reg = <0xffb90000 0x1000>;
+    altr,sdr-syscon = <&sdr>;
+    interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+                 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+    };
+
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    edac@f8004000 {
+    compatible = "altr,sdram-edac-s10";
+    reg = <0xf8004000 0x1000>;
+    altr,sdr-syscon = <&sdr>;
+    interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+    };
+
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    edac@ffc25000 {
+    compatible = "altr,sdram-edac";
+    reg = <0xffc25000 0x1000>;
+    altr,sdr-syscon = <&sdr>;
+    interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+    };
-- 
2.34.1

Re: [PATCH v4] dt-bindings: arm: Convert Altera SDRAM EDAC .txt to YAML

[Rob Herring (Arm)]

On Tue, 10 Jun 2025 20:41:05 +0530, Shankari Anand wrote:
> Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
> .txt format to a YAML schema.
> 
> Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
> ---
>  .../arm/altera/socfpga-sdram-edac.txt         | 15 ----
>  .../arm/altera/socfpga-sdram-edac.yaml        | 79 +++++++++++++++++++
>  2 files changed, 79 insertions(+), 15 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
>  create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.example.dtb: sdramedac (altr,sdram-edac-s10): 'reg' is a required property
	from schema $id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250610151105.393011-1-shankari.ak0208@gmail.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.

Re: [PATCH v4] dt-bindings: arm: Convert Altera SDRAM EDAC .txt to YAML

[Shankari Anand]

> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.example.dtb: sdramedac (altr,sdram-edac-s10): 'reg' is a required property
>         from schema $id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#

The command ran without any errors for me.
shankari@shankari-IdeaPad:~/linux$ make dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
  SCHEMA  Documentation/devicetree/bindings/processed-schema.json
  CHKDT   ./Documentation/devicetree/bindings
  LINT    ./Documentation/devicetree/bindings
  DTEX    Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.example.dts
  DTC [C] Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.example.dtb

Also my patch includes reg for all compatibles.
>
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
>
> +
> +    edac@ffb90000 {
> +    compatible = "altr,sdram-edac-a10";
> +    reg = <0xffb90000 0x1000>;
> +    altr,sdr-syscon = <&sdr>;
> +    interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
> +                 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
> +    };
>
> +
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +
>
> +    edac@f8004000 {
> +    compatible = "altr,sdram-edac-s10";
> +    reg = <0xf8004000 0x1000>;
> +    altr,sdr-syscon = <&sdr>;
> +    interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> +    };
>
> +
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +
> +    edac@ffc25000 {
> +    compatible = "altr,sdram-edac";
> +    reg = <0xffc25000 0x1000>;


On Tue, Jun 10, 2025 at 10:22 PM Rob Herring (Arm) <robh@kernel.org> wrote:
>
>
> On Tue, 10 Jun 2025 20:41:05 +0530, Shankari Anand wrote:
> > Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
> > .txt format to a YAML schema.
> >
> > Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
> > ---
> >  .../arm/altera/socfpga-sdram-edac.txt         | 15 ----
> >  .../arm/altera/socfpga-sdram-edac.yaml        | 79 +++++++++++++++++++
> >  2 files changed, 79 insertions(+), 15 deletions(-)
> >  delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
> >  create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> >
>
> My bot found errors running 'make dt_binding_check' on your patch:
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.example.dtb: sdramedac (altr,sdram-edac-s10): 'reg' is a required property
>         from schema $id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#
>
> doc reference errors (make refcheckdocs):
>
> See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250610151105.393011-1-shankari.ak0208@gmail.com
>
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit after running the above command yourself. Note
> that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> your schema. However, it must be unset to test all examples with your schema.
>

Re: [PATCH v4] dt-bindings: arm: Convert Altera SDRAM EDAC .txt to YAML

[Rob Herring]

On Tue, Jun 10, 2025 at 11:01:37PM +0530, Shankari Anand wrote:
> > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/edac/altr,socfpga-ecc-manager.example.dtb: sdramedac (altr,sdram-edac-s10): 'reg' is a required property
> >         from schema $id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#
> 
> The command ran without any errors for me.
> shankari@shankari-IdeaPad:~/linux$ make dt_binding_check
> DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml

Because with DT_SCHEMA_FILES everything is not tested. The warning is 
from another example.

Don't send new versions as replies to the prior versions. And slow down 
your rate a bit. We're not all in the same timezone.

Rob

Re: [PATCH v2] dt-bindings: arm: Convert Altera SDRAM EDAC .txt to YAML

[Krzysztof Kozlowski]

On 10/06/2025 17:09, Shankari Anand wrote:
> Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
> .txt format to a YAML schema.
> 
> Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
> ---
>  .../arm/altera/socfpga-sdram-edac.txt         | 15 ----
>  .../arm/altera/socfpga-sdram-edac.yaml        | 76 +++++++++++++++++++

Do not attach (thread) your patchsets to some other threads (unrelated
or older versions). This buries them deep in the mailbox and might
interfere with applying entire sets.

Also nothing previously was tested... We are not a testing service.


Best regards,
Krzysztof

Re: [PATCH v4] dt-bindings: arm: Convert Altera SDRAM EDAC .txt to YAML

[Krzysztof Kozlowski]

On 10/06/2025 17:11, Shankari Anand wrote:
> Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
> .txt format to a YAML schema.
> 
> Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
> ---
>  .../arm/altera/socfpga-sdram-edac.txt         | 15 ----
>  .../arm/altera/socfpga-sdram-edac.yaml        | 79 +++++++++++++++++++

Nothing improved about location. Also entire example is corrupted now.

Can you slow down? One patch per day, learn from the mistakes and
reports, test before sending and then double check your patch before
sending.

Best regards,
Krzysztof

Re: [PATCH v4] dt-bindings: arm: Convert Altera SDRAM EDAC .txt to YAML

[Krzysztof Kozlowski]

On 10/06/2025 17:11, Shankari Anand wrote:
> Convert the Altera SOCFPGA SDRAM EDAC devicetree binding from the
> .txt format to a YAML schema.
> 
> Signed-off-by: Shankari Anand <shankari.ak0208@gmail.com>
> ---
>  .../arm/altera/socfpga-sdram-edac.txt         | 15 ----
>  .../arm/altera/socfpga-sdram-edac.yaml        | 79 +++++++++++++++++++
Also, where is the changelog? You sent like 4 emails - are these all the
same? Provide detailed changelog in cover letter or under '---' of
individual patches describing changes from previous version.

Best regards,
Krzysztof