* [PATCH RESEND] powerpc: dts: mpc8315erdb: Add GPIO controller node
@ 2025-06-11 19:01 J. Neuschäfer via B4 Relay
2025-06-15 2:38 ` Madhavan Srinivasan
0 siblings, 1 reply; 2+ messages in thread
From: J. Neuschäfer via B4 Relay @ 2025-06-11 19:01 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Madhavan Srinivasan, Michael Ellerman, Nicholas Piggin,
Christophe Leroy, Naveen N Rao
Cc: devicetree, linuxppc-dev, linux-kernel, J. Neuschäfer
From: "J. Neuschäfer" <j.ne@posteo.net>
The MPC8315E SoC and variants have a GPIO controller at IMMR + 0xc00.
This node was previously missing from the device tree.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
---
A version of this patch was previously part of the series "powerpc:
MPC83xx cleanup and LANCOM NWAPP2 board", but I'm splitting it out to
reduce the size of that series.
---
arch/powerpc/boot/dts/mpc8315erdb.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index e09b37d7489d01bfd16a26e9786868f630fa0262..a89cb3139ca8c3d4f22e43838a4b7d2dd5109aa5 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -6,6 +6,7 @@
*/
/dts-v1/;
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "fsl,mpc8315erdb";
@@ -358,6 +359,15 @@ pmc: power@b00 {
interrupt-parent = <&ipic>;
fsl,mpc8313-wakeup-timer = <>m1>;
};
+
+ gpio: gpio-controller@c00 {
+ compatible = "fsl,mpc8314-gpio";
+ reg = <0xc00 0x100>;
+ interrupts = <74 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&ipic>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
pci0: pci@e0008500 {
---
base-commit: 0af2f6be1b4281385b618cb86ad946eded089ac8
change-id: 20250418-mpc-gpio-79dca9f70546
Best regards,
--
J. Neuschäfer <j.ne@posteo.net>
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH RESEND] powerpc: dts: mpc8315erdb: Add GPIO controller node
2025-06-11 19:01 [PATCH RESEND] powerpc: dts: mpc8315erdb: Add GPIO controller node J. Neuschäfer via B4 Relay
@ 2025-06-15 2:38 ` Madhavan Srinivasan
0 siblings, 0 replies; 2+ messages in thread
From: Madhavan Srinivasan @ 2025-06-15 2:38 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Michael Ellerman,
Nicholas Piggin, Christophe Leroy, Naveen N Rao,
J. Neuschäfer
Cc: devicetree, linuxppc-dev, linux-kernel
On Wed, 11 Jun 2025 21:01:01 +0200, J. Neuschäfer wrote:
> The MPC8315E SoC and variants have a GPIO controller at IMMR + 0xc00.
> This node was previously missing from the device tree.
>
>
Applied to powerpc/fixes.
[1/1] powerpc: dts: mpc8315erdb: Add GPIO controller node
https://git.kernel.org/powerpc/c/e75cb6010838f61b9d63e921d1763a8ab177e38e
Thanks
^ permalink raw reply [flat|nested] 2+ messages in thread
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2025-06-15 2:38 ` Madhavan Srinivasan
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