From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF1E22C1583; Fri, 13 Jun 2025 10:16:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749809791; cv=none; b=aSAuakcKEy5O9kN7ds4OES6btUOkq8Mbg30XfmI4PWfqQqr7lQXMrHiWlrLNh0HhmvcQbHyOpjLxnZgowrC9nDylDHFOpjkiKUjDPU3NqYkOvEbVJ3cB7L7wpxSXn2i3CTPHzBWI2vpXGW8789N536DOiSWiWZUKvakM0+jqbeU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749809791; c=relaxed/simple; bh=RLvV0rMPRETp8kXQ1/QLsAR0m2oC5br14HZ07aP+kLY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=CcnsZq//K+hIvhu+xQ7SJolOCGPOGUAdAQSIUvophvPHGBKUiHikkGrqKs16MUUj2CYxzeljLZ1GDJ5KuxBOHgKznIW8kK6LfdQPP+MxZ5K34U3LpfnA7aYakfewEGzEHfGTsSQ61Dvg809tjGh98RR1k776tIE5w8x9OuUOJOg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=m27n3SdG; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="m27n3SdG" Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 55D6x3fp024607; Fri, 13 Jun 2025 12:16:16 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= vCMmTABrSBqeAhv7e77caexkaudNwZFg/B0FOzQ1fiU=; b=m27n3SdG369Vt4bz KRQtTMX3cNShryz6qllgM4fO86MSkLyfwAaqh51xYOj+9M9KZ1oALA2LCJi/ar0V MfEAGvpcDx3laHsP4VXCsMPuju5wwvQJ/YFYp69ju5pfWU460rVlYzazFyo2gtxx b/iLY1Z52iQSKpIQCn5Dyq4veM8m9To8f2sL2okYkPG0eeYKTXPEoyKbtTPEoXoa u0EByOI1X4ue6UdaTxqro6fisBeGJCqQQ+x2BmmmldZQzEHFN5WOuBlp6cpEtZF4 59HSfPVLVtLHC4mCbWEMQqwgxBLJIWZHyEnYHjkEkXxwov1YzCXpcq+XU/nlF9g7 8jdcmg== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 474cs356an-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 13 Jun 2025 12:16:16 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id E03E44005E; Fri, 13 Jun 2025 12:15:09 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 964F92F6EF1; Fri, 13 Jun 2025 12:14:22 +0200 (CEST) Received: from localhost (10.48.86.185) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 13 Jun 2025 12:14:22 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Fri, 13 Jun 2025 12:14:18 +0200 Subject: [PATCH v5 7/9] ARM: dts: stm32: add Hardware debug port (HDP) on stm32mp25 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20250613-hdp-upstream-v5-7-6fd6f0dc527c@foss.st.com> References: <20250613-hdp-upstream-v5-0-6fd6f0dc527c@foss.st.com> In-Reply-To: <20250613-hdp-upstream-v5-0-6fd6f0dc527c@foss.st.com> To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski CC: , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-0537a X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-06-12_10,2025-06-12_02,2025-03-28_01 Add the hdp devicetree node for stm32mp25 SoC family Keep the node disabled as HDP needs the pinctrl SoC configuration to be able to output its mux output signal outside of the SoC, on the SoC pad. This configuration is provided in the board dtsi file through 'pinctrl-*' properties as well as HDP mux configuration. Thus, if needed, HDP should be enabled in board dtsi file. Signed-off-by: Clément Le Goffic --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi index 8d87865850a7..fa2b6a1881f2 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -1148,6 +1148,13 @@ package_otp@1e8 { }; }; + hdp: pinctrl@44090000 { + compatible = "st,stm32mp251-hdp"; + reg = <0x44090000 0x400>; + clocks = <&rcc CK_BUS_HDP>; + status = "disabled"; + }; + rcc: clock-controller@44200000 { compatible = "st,stm32mp25-rcc"; reg = <0x44200000 0x10000>; -- 2.43.0