From: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: Marc Zyngier <maz@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>,
Sascha Bischoff <sascha.bischoff@arm.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Timothy Hayes <timothy.hayes@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
"Liam R. Howlett" <Liam.Howlett@oracle.com>,
Peter Maydell <peter.maydell@linaro.org>,
Mark Rutland <mark.rutland@arm.com>,
Jiri Slaby <jirislaby@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org,
Lorenzo Pieralisi <lpieralisi@kernel.org>
Subject: [PATCH v5 14/27] arm64/sysreg: Add ICH_HFGITR_EL2
Date: Wed, 18 Jun 2025 12:17:29 +0200 [thread overview]
Message-ID: <20250618-gicv5-host-v5-14-d9e622ac5539@kernel.org> (raw)
In-Reply-To: <20250618-gicv5-host-v5-0-d9e622ac5539@kernel.org>
Add ICH_HFGITR_EL2 register description to sysreg.
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
---
arch/arm64/tools/sysreg | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 9def240582dc..aab58bf4ed9c 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -4467,6 +4467,21 @@ Res0 1
Field 0 ICC_APR_EL1
EndSysreg
+Sysreg ICH_HFGITR_EL2 3 4 12 9 7
+Res0 63:11
+Field 10 GICRCDNMIA
+Field 9 GICRCDIA
+Field 8 GICCDDI
+Field 7 GICCDEOI
+Field 6 GICCDHM
+Field 5 GICCDRCFG
+Field 4 GICCDPEND
+Field 3 GICCDAFF
+Field 2 GICCDPRI
+Field 1 GICCDDIS
+Field 0 GICCDEN
+EndSysreg
+
Sysreg ICH_HCR_EL2 3 4 12 11 0
Res0 63:32
Field 31:27 EOIcount
--
2.48.0
next prev parent reply other threads:[~2025-06-18 10:19 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-18 10:17 [PATCH v5 00/27] Arm GICv5: Host driver implementation Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 01/27] dt-bindings: interrupt-controller: Add Arm GICv5 Lorenzo Pieralisi
2025-06-18 18:52 ` Rob Herring (Arm)
2025-06-18 10:17 ` [PATCH v5 02/27] arm64/sysreg: Add GCIE field to ID_AA64PFR2_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 03/27] arm64/sysreg: Add ICC_PPI_PRIORITY<n>_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 04/27] arm64/sysreg: Add ICC_ICSR_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 05/27] arm64/sysreg: Add ICC_PPI_HMR<n>_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 06/27] arm64/sysreg: Add ICC_PPI_ENABLER<n>_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 07/27] arm64/sysreg: Add ICC_PPI_{C/S}ACTIVER<n>_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 08/27] arm64/sysreg: Add ICC_PPI_{C/S}PENDR<n>_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 09/27] arm64/sysreg: Add ICC_CR0_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 10/27] arm64/sysreg: Add ICC_PCR_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 11/27] arm64/sysreg: Add ICC_IDR0_EL1 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 12/27] arm64/sysreg: Add ICH_HFGRTR_EL2 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 13/27] arm64/sysreg: Add ICH_HFGWTR_EL2 Lorenzo Pieralisi
2025-06-18 10:17 ` Lorenzo Pieralisi [this message]
2025-06-18 10:17 ` [PATCH v5 15/27] arm64: Disable GICv5 read/write/instruction traps Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 16/27] arm64: cpucaps: Rename GICv3 CPU interface capability Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 17/27] arm64: cpucaps: Add GICv5 CPU interface (GCIE) capability Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 18/27] arm64: smp: Support non-SGIs for IPIs Lorenzo Pieralisi
2025-06-25 18:53 ` Marc Zyngier
2025-06-18 10:17 ` [PATCH v5 19/27] arm64: Add support for GICv5 GSB barriers Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 20/27] irqchip/gic-v5: Add GICv5 PPI support Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 21/27] irqchip/gic-v5: Add GICv5 IRS/SPI support Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 22/27] irqchip/gic-v5: Add GICv5 LPI/IPI support Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 23/27] irqchip/gic-v5: Enable GICv5 SMP booting Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 24/27] irqchip/gic-v5: Add GICv5 ITS support Lorenzo Pieralisi
2025-06-18 19:56 ` Lorenzo Pieralisi
2025-06-20 19:18 ` Thomas Gleixner
2025-06-23 7:43 ` Lorenzo Pieralisi
2025-06-23 9:26 ` Lorenzo Pieralisi
2025-06-23 19:04 ` Thomas Gleixner
2025-06-18 10:17 ` [PATCH v5 25/27] irqchip/gic-v5: Add GICv5 IWB support Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 26/27] docs: arm64: gic-v5: Document booting requirements for GICv5 Lorenzo Pieralisi
2025-06-18 10:17 ` [PATCH v5 27/27] arm64: Kconfig: Enable GICv5 Lorenzo Pieralisi
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