From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E39E42882BF; Wed, 18 Jun 2025 10:19:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750241943; cv=none; b=tOJC37Gm3OLpkr2RmZJ+GIrl8ii3ZdoKQEFmP1GmN21ff/IexLXfs2SGMv2NRphN94bf9MUQafmjwbK/O5wK7XhEJrDESWr9NlZCS0CdbfNUtds7GLwtini+47NnRscEHSJTPSABkicLhYDkXPccZNzhIO4Mb21PX1XSg68gBHg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750241943; c=relaxed/simple; bh=CsFjS4cyCjBMHSlrxIiOTX79lluDqAGnleJSeF5bDt4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rwQvJbGZWWY2wnh8GeSQxAoXrFGcuRWuZA8VdCzFks8oDKX6hTyE1tWLlcu/a+2WW3b1H1+OLVlHfUkMXvQFl9B0mrgq0XX8A8DZ7wKGMYcFyJg6itb/mYF51/zHlr7kox6E907lJf9KWv5K8cMcEVEbGtaSl4qw+6eVRlxC28E= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oKM1Z7nm; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oKM1Z7nm" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DDCC0C4CEE7; Wed, 18 Jun 2025 10:18:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1750241942; bh=CsFjS4cyCjBMHSlrxIiOTX79lluDqAGnleJSeF5bDt4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=oKM1Z7nm+5K9oUbXTaggGwmAl1ZxJyjdP+wBxZaU6jQHII7gLLdcHMeAq51fvlNU7 bnTgDhMkFyLU+lVZmxaXqMz2yS6uxvxyOUH5MrLTJ1eYQLFQ8+Arao8BpLzZUZd4Z6 MKQaekYZtYtgW9V1+v/AiYYphWSpk/duFlvtBcrBEGY0rHSsNiFAgmm5bx1Ub3K0IU qIToDRqTKcDQz1A0QjIhteKH5CBit6rt2Kzx7l/DndlYE4Nr6tbELXoEjdneKoyKRi Xcfc0N5LJisFAUTrEQIdm4B2VjBMBohKyxG6z0J9JutbC+pCna0urVgG78K2pu9O8b +8xkCyc2mXQXg== From: Lorenzo Pieralisi Date: Wed, 18 Jun 2025 12:17:29 +0200 Subject: [PATCH v5 14/27] arm64/sysreg: Add ICH_HFGITR_EL2 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250618-gicv5-host-v5-14-d9e622ac5539@kernel.org> References: <20250618-gicv5-host-v5-0-d9e622ac5539@kernel.org> In-Reply-To: <20250618-gicv5-host-v5-0-d9e622ac5539@kernel.org> To: Marc Zyngier , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon Cc: Arnd Bergmann , Sascha Bischoff , Jonathan Cameron , Timothy Hayes , Bjorn Helgaas , "Liam R. Howlett" , Peter Maydell , Mark Rutland , Jiri Slaby , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, Lorenzo Pieralisi X-Mailer: b4 0.15-dev-6f78e Add ICH_HFGITR_EL2 register description to sysreg. Signed-off-by: Lorenzo Pieralisi Reviewed-by: Jonathan Cameron Cc: Will Deacon Cc: Catalin Marinas Cc: Marc Zyngier --- arch/arm64/tools/sysreg | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 9def240582dc..aab58bf4ed9c 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -4467,6 +4467,21 @@ Res0 1 Field 0 ICC_APR_EL1 EndSysreg +Sysreg ICH_HFGITR_EL2 3 4 12 9 7 +Res0 63:11 +Field 10 GICRCDNMIA +Field 9 GICRCDIA +Field 8 GICCDDI +Field 7 GICCDEOI +Field 6 GICCDHM +Field 5 GICCDRCFG +Field 4 GICCDPEND +Field 3 GICCDAFF +Field 2 GICCDPRI +Field 1 GICCDDIS +Field 0 GICCDEN +EndSysreg + Sysreg ICH_HCR_EL2 3 4 12 11 0 Res0 63:32 Field 31:27 EOIcount -- 2.48.0