* [PATCH] dt-bindings: net: convert socfpga-dwmac.txt to DT schema
@ 2025-06-21 3:44 Dinh Nguyen
2025-06-22 21:55 ` Rob Herring (Arm)
2025-06-23 22:20 ` Rob Herring
0 siblings, 2 replies; 3+ messages in thread
From: Dinh Nguyen @ 2025-06-21 3:44 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowskii+dt, conor+dt; +Cc: dinguyen, devicetree
Convert the socfpga-dwmac.txt to yaml.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
.../bindings/net/altr,dwmac-socfpga.yaml | 152 ++++++++++++++++++
.../devicetree/bindings/net/socfpga-dwmac.txt | 57 -------
2 files changed, 152 insertions(+), 57 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/altr,dwmac-socfpga.yaml
delete mode 100644 Documentation/devicetree/bindings/net/socfpga-dwmac.txt
diff --git a/Documentation/devicetree/bindings/net/altr,dwmac-socfpga.yaml b/Documentation/devicetree/bindings/net/altr,dwmac-socfpga.yaml
new file mode 100644
index 000000000000..fc088bd55178
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/altr,dwmac-socfpga.yaml
@@ -0,0 +1,152 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel/Altera SoCFPGA DWMAC controller
+
+maintainers:
+ - Dinh Nguyen <dinguyen@kernel.org>
+
+properties:
+ compatible:
+ additionalItems: true
+ maxItems: 3
+ items:
+ - enum:
+ - altr,socfpga-stmmac
+ - altr,socfpga-stmmac-a10-s10
+ contains:
+ enum:
+ - snps,dwmac-3.74a
+ - snps,dwmac-3.70a
+ - snps,dwmac
+
+ reg:
+ items:
+ - description: Base DWMAC registers
+
+ iommus:
+ minItems: 1
+ maxItems: 2
+
+ clocks:
+ minItems: 1
+ items:
+ - description: MAC host clock
+ - description: MAC timer clock
+
+ clock-names:
+ minItems: 1
+ maxItems: 2
+ contains:
+ enum:
+ - stmmaceth
+ - ptp_ref
+
+ resets:
+ minItems: 1
+ items:
+ - description: GMAC stmmaceth reset
+ - description: AHB reset
+
+ reset-names:
+ oneOf:
+ - items:
+ - enum: [stmmaceth, ahb]
+ - items:
+ - const: stmmaceth
+ - const: ahb
+
+ interrupts:
+ items:
+ - description: DWAC interrupt
+
+ interrupt-names:
+ items:
+ - const: macirq
+
+ mac-address: true
+
+ phy-mode:
+ maxItems: 1
+ items:
+ enum:
+ - rgmii
+ - gmii
+ - mii
+
+ tx-fifo-depth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: DWMAC Tx fifo depth(Stratix10, Agilex)
+
+ rx-fifo-depth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: DWMAC Rx fifo depth(Stratix10, Agilex)
+
+ snps,multicast-filter-bins:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Number of multicast filter hash bins supported by this device
+ instance
+
+ altr,sysmgr-syscon:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: phandle to the sysmgr node
+ - description: register offset that controls the SDMMC clock phase
+ - description: register shift for the smplsel(drive in) setting
+ description:
+ Should be the phandle to the system manager node that
+ encompasses the glue register, the register offset, and the register shift.
+ On Cyclone5/Arria5, the register shift represents the PHY mode bits, while
+ on the Arria10/Stratix10/Agilex platforms, the register shift represents
+ bit for each emac to enable/disable signals from the FPGA fabric to the
+ EMAC modules.
+
+ altr,emac-splitter:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Should be the phandle to the emac splitter soft IP node if DWMAC
+ controller is connected emac splitter.
+
+ altr,sgmii-to-sgmii-converter:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to the TSE SGMII converter.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - phy-mode
+
+allOf:
+ - $ref: snps,dwmac.yaml#
+
+additionalProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ gmac0: ethernet@ff700000 {
+ compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
+ altr,sysmgr-syscon = <&sysmgr 0x60 0>;
+ reg = <0xff700000 0x2000>;
+ interrupts = <0 115 4>;
+ interrupt-names = "macirq";
+ mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
+ clocks = <&emac_0_clk>;
+ clock-names = "stmmaceth";
+ phy-mode = "rgmii";
+ tx-fifo-depth = <16384>;
+ rx-fifo-depth = <16384>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
deleted file mode 100644
index 612a8e8abc88..000000000000
--- a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
+++ /dev/null
@@ -1,57 +0,0 @@
-Altera SOCFPGA SoC DWMAC controller
-
-This is a variant of the dwmac/stmmac driver an inherits all descriptions
-present in Documentation/devicetree/bindings/net/stmmac.txt.
-
-The device node has additional properties:
-
-Required properties:
- - compatible : For Cyclone5/Arria5 SoCs it should contain
- "altr,socfpga-stmmac". For Arria10/Agilex/Stratix10 SoCs
- "altr,socfpga-stmmac-a10-s10".
- Along with "snps,dwmac" and any applicable more detailed
- designware version numbers documented in stmmac.txt
- - altr,sysmgr-syscon : Should be the phandle to the system manager node that
- encompasses the glue register, the register offset, and the register shift.
- On Cyclone5/Arria5, the register shift represents the PHY mode bits, while
- on the Arria10/Stratix10/Agilex platforms, the register shift represents
- bit for each emac to enable/disable signals from the FPGA fabric to the
- EMAC modules.
- - altr,f2h_ptp_ref_clk use f2h_ptp_ref_clk instead of default eosc1 clock
- for ptp ref clk. This affects all emacs as the clock is common.
-
-Optional properties:
-altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if
- DWMAC controller is connected emac splitter.
-phy-mode: The phy mode the ethernet operates in
-altr,sgmii-to-sgmii-converter: phandle to the TSE SGMII converter
-
-This device node has additional phandle dependency, the sgmii converter:
-
-Required properties:
- - compatible : Should be altr,gmii-to-sgmii-2.0
- - reg-names : Should be "eth_tse_control_port"
-
-Example:
-
-gmii_to_sgmii_converter: phy@100000240 {
- compatible = "altr,gmii-to-sgmii-2.0";
- reg = <0x00000001 0x00000240 0x00000008>,
- <0x00000001 0x00000200 0x00000040>;
- reg-names = "eth_tse_control_port";
- clocks = <&sgmii_1_clk_0 &emac1 1 &sgmii_clk_125 &sgmii_clk_125>;
- clock-names = "tse_pcs_ref_clk_clock_connection", "tse_rx_cdr_refclk";
-};
-
-gmac0: ethernet@ff700000 {
- compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
- altr,sysmgr-syscon = <&sysmgr 0x60 0>;
- reg = <0xff700000 0x2000>;
- interrupts = <0 115 4>;
- interrupt-names = "macirq";
- mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
- clocks = <&emac_0_clk>;
- clock-names = "stmmaceth";
- phy-mode = "sgmii";
- altr,gmii-to-sgmii-converter = <&gmii_to_sgmii_converter>;
-};
--
2.42.0.411.g813d9a9188
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: net: convert socfpga-dwmac.txt to DT schema
2025-06-21 3:44 [PATCH] dt-bindings: net: convert socfpga-dwmac.txt to DT schema Dinh Nguyen
@ 2025-06-22 21:55 ` Rob Herring (Arm)
2025-06-23 22:20 ` Rob Herring
1 sibling, 0 replies; 3+ messages in thread
From: Rob Herring (Arm) @ 2025-06-22 21:55 UTC (permalink / raw)
To: Dinh Nguyen; +Cc: krzysztof.kozlowskii+dt, devicetree, conor+dt, robh+dt
On Fri, 20 Jun 2025 22:44:01 -0500, Dinh Nguyen wrote:
> Convert the socfpga-dwmac.txt to yaml.
>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> .../bindings/net/altr,dwmac-socfpga.yaml | 152 ++++++++++++++++++
> .../devicetree/bindings/net/socfpga-dwmac.txt | 57 -------
> 2 files changed, 152 insertions(+), 57 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/net/altr,dwmac-socfpga.yaml
> delete mode 100644 Documentation/devicetree/bindings/net/socfpga-dwmac.txt
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.example.dtb: ethernet@44000000 (renesas,r9a06g032-gmac): 'pcs-handle', 'power-domains', 'snps,perfect-filter-entries' do not match any of the regexes: '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.example.dtb: ethernet@44000000 (renesas,r9a06g032-gmac): compatible:0: 'renesas,r9a06g032-gmac' is not one of ['altr,socfpga-stmmac', 'altr,socfpga-stmmac-a10-s10']
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.example.dtb: ethernet@44000000 (renesas,r9a06g032-gmac): interrupt-names: ['macirq', 'eth_wake_irq', 'eth_lpi'] is too long
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.example.dtb: ethernet@44000000 (renesas,r9a06g032-gmac): interrupts: [[0, 34, 4], [0, 36, 4], [0, 35, 4]] is too long
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.example.dtb: ethernet@c9410000 (amlogic,meson-gxbb-dwmac): clock-names: ['stmmaceth', 'clkin0', 'clkin1', 'timing-adjustment'] is too long
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.example.dtb: ethernet@c9410000 (amlogic,meson-gxbb-dwmac): clocks: [[4294967295], [4294967295], [4294967295], [4294967295]] is too long
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.example.dtb: ethernet@c9410000 (amlogic,meson-gxbb-dwmac): compatible:0: 'amlogic,meson-gxbb-dwmac' is not one of ['altr,socfpga-stmmac', 'altr,socfpga-stmmac-a10-s10']
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.example.dtb: ethernet@c9410000 (amlogic,meson-gxbb-dwmac): reg: [[3376480256, 65536], [3364046144, 8]] is too long
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/thead,th1520-gmac.example.dtb: ethernet@e7070000 (thead,th1520-gmac): 'mdio', 'phy-handle', 'reg-names', 'snps,axi-config', 'snps,fixed-burst', 'snps,pbl' do not match any of the regexes: '^pinctrl-[0-9]+$'
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/thead,th1520-gmac.example.dtb: ethernet@e7070000 (thead,th1520-gmac): compatible:0: 'thead,th1520-gmac' is not one of ['altr,socfpga-stmmac', 'altr,socfpga-stmmac-a10-s10']
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/thead,th1520-gmac.example.dtb: ethernet@e7070000 (thead,th1520-gmac): phy-mode:0: 'rgmii-id' is not one of ['rgmii', 'gmii', 'mii']
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/thead,th1520-gmac.example.dtb: ethernet@e7070000 (thead,th1520-gmac): reg: [[3875995648, 8192], [3959435264, 4096]] is too long
from schema $id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
doc reference errors (make refcheckdocs):
Warning: MAINTAINERS references a file that doesn't exist: Documentation/devicetree/bindings/net/socfpga-dwmac.txt
MAINTAINERS: Documentation/devicetree/bindings/net/socfpga-dwmac.txt
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250621034401.586780-1-dinguyen@kernel.org
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: net: convert socfpga-dwmac.txt to DT schema
2025-06-21 3:44 [PATCH] dt-bindings: net: convert socfpga-dwmac.txt to DT schema Dinh Nguyen
2025-06-22 21:55 ` Rob Herring (Arm)
@ 2025-06-23 22:20 ` Rob Herring
1 sibling, 0 replies; 3+ messages in thread
From: Rob Herring @ 2025-06-23 22:20 UTC (permalink / raw)
To: Dinh Nguyen; +Cc: krzysztof.kozlowskii+dt, conor+dt, devicetree
On Fri, Jun 20, 2025 at 10:44:01PM -0500, Dinh Nguyen wrote:
> Convert the socfpga-dwmac.txt to yaml.
>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> .../bindings/net/altr,dwmac-socfpga.yaml | 152 ++++++++++++++++++
> .../devicetree/bindings/net/socfpga-dwmac.txt | 57 -------
> 2 files changed, 152 insertions(+), 57 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/net/altr,dwmac-socfpga.yaml
> delete mode 100644 Documentation/devicetree/bindings/net/socfpga-dwmac.txt
>
> diff --git a/Documentation/devicetree/bindings/net/altr,dwmac-socfpga.yaml b/Documentation/devicetree/bindings/net/altr,dwmac-socfpga.yaml
> new file mode 100644
> index 000000000000..fc088bd55178
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/altr,dwmac-socfpga.yaml
> @@ -0,0 +1,152 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/altr,dwmac-socfpga.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel/Altera SoCFPGA DWMAC controller
> +
> +maintainers:
> + - Dinh Nguyen <dinguyen@kernel.org>
> +
You'll need a custom 'select' to avoid matching on the common compatible
strings.
> +properties:
> + compatible:
> + additionalItems: true
> + maxItems: 3
> + items:
> + - enum:
> + - altr,socfpga-stmmac
> + - altr,socfpga-stmmac-a10-s10
> + contains:
> + enum:
> + - snps,dwmac-3.74a
> + - snps,dwmac-3.70a
> + - snps,dwmac
Need to define the exact combinations of compatible strings which are
valid.
> +
> + reg:
> + items:
> + - description: Base DWMAC registers
Just 'maxItems: 1'
> +
> + iommus:
> + minItems: 1
> + maxItems: 2
> +
> + clocks:
> + minItems: 1
> + items:
> + - description: MAC host clock
> + - description: MAC timer clock
> +
> + clock-names:
> + minItems: 1
> + maxItems: 2
> + contains:
> + enum:
> + - stmmaceth
> + - ptp_ref
'contains' passes if either of these strings is present and allows
anything for the 2nd string. Use 'items' instead and define the exact
order and entries.
> +
> + resets:
> + minItems: 1
> + items:
> + - description: GMAC stmmaceth reset
> + - description: AHB reset
> +
> + reset-names:
> + oneOf:
> + - items:
> + - enum: [stmmaceth, ahb]
Drop this and add 'minItems: 1' below.
> + - items:
> + - const: stmmaceth
> + - const: ahb
> +
> + interrupts:
> + items:
> + - description: DWAC interrupt
typo.
> +
> + interrupt-names:
> + items:
> + - const: macirq
> +
> + mac-address: true
Drop
> +
> + phy-mode:
> + maxItems: 1
> + items:
> + enum:
> + - rgmii
> + - gmii
> + - mii
> +
> + tx-fifo-depth:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: DWMAC Tx fifo depth(Stratix10, Agilex)
> +
> + rx-fifo-depth:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: DWMAC Rx fifo depth(Stratix10, Agilex)
Already defined in ethernet-controller.yaml. Drop unless you have
additional constaints on them.
> +
> + snps,multicast-filter-bins:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Number of multicast filter hash bins supported by this device
> + instance
Already defined in snps,dwmac.yaml. Drop unless you have additional
constaints on it.
> +
> + altr,sysmgr-syscon:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + - items:
> + - description: phandle to the sysmgr node
> + - description: register offset that controls the SDMMC clock phase
> + - description: register shift for the smplsel(drive in) setting
> + description:
> + Should be the phandle to the system manager node that
> + encompasses the glue register, the register offset, and the register shift.
> + On Cyclone5/Arria5, the register shift represents the PHY mode bits, while
> + on the Arria10/Stratix10/Agilex platforms, the register shift represents
> + bit for each emac to enable/disable signals from the FPGA fabric to the
> + EMAC modules.
> +
> + altr,emac-splitter:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Should be the phandle to the emac splitter soft IP node if DWMAC
> + controller is connected emac splitter.
> +
> + altr,sgmii-to-sgmii-converter:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Phandle to the TSE SGMII converter.
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - phy-mode
> +
> +allOf:
> + - $ref: snps,dwmac.yaml#
> +
> +additionalProperties: false
unevaluatedProperties: false
> +
> +examples:
> + - |
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
Don't need this node.
> +
> + gmac0: ethernet@ff700000 {
> + compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
> + altr,sysmgr-syscon = <&sysmgr 0x60 0>;
> + reg = <0xff700000 0x2000>;
> + interrupts = <0 115 4>;
> + interrupt-names = "macirq";
> + mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
> + clocks = <&emac_0_clk>;
> + clock-names = "stmmaceth";
> + phy-mode = "rgmii";
> + tx-fifo-depth = <16384>;
> + rx-fifo-depth = <16384>;
> + };
> + };
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2025-06-23 22:20 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-06-21 3:44 [PATCH] dt-bindings: net: convert socfpga-dwmac.txt to DT schema Dinh Nguyen
2025-06-22 21:55 ` Rob Herring (Arm)
2025-06-23 22:20 ` Rob Herring
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).