From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE056279DB3; Mon, 23 Jun 2025 15:39:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750693181; cv=none; b=SAYjAdfTDgewmuun3CjQsQ5XZCpWZ/wzqh2u1z3U9bJvqK5bM0ubNNdE+SasMruhw5UFazRrK9+/6Fq/VXOYv7ZfXsje2aNV5YrQF1G0jrtzWFfvQSplQCtD+UCb24GYVggip1RbMM1+8g0I+p7ro15RYtpv554AOnzEVRAsfFQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750693181; c=relaxed/simple; bh=YVmyuVmG8U9COIUymK6jtMbds8K4tIK3OpmbukRxYzg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=j3uZbI4n3jmp8cz6rwYbKtOWqxCn8GhGGKwCs0n98sC69X6l+DXRTlwFkhGiKASN9iHX3bXz02h7FLPEBQyRxELNdWbXdf0ojN9uvcZVO74F3xXnxpXW1pjAnNI0PImRDt9A60rwVsPn1oOuAV3F+TqvVC3Ci4VQZcBds/U7rtg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=nvKa4IV9; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="nvKa4IV9" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1750693178; bh=YVmyuVmG8U9COIUymK6jtMbds8K4tIK3OpmbukRxYzg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nvKa4IV99C8p3iR+2pHUdiGRNHnD2DwgKJv/g+y0OAzbc0ye1Rk49uo3FXnBPAlkH 2sHhGf50GalKMYxYwd7cgUdJ0XYy8WNNDjRdSZ1dA/tGdYf84rusI1I5tfk8TfXIsO 6LgNtvbwnZEEWSWCPrOmezmKw7F0DX9FblOiKq/81iXDLqjOXPW7QYEHOztR5Jleu9 LlrSdgksICaY6EngTu73cW4Oylrw5FS5SQQtm+6j6bbNb6/pOeCBk14fIZ4GA/vNCe wEjw8uX1tS143A5qU08Oqj2vIZ0rIlJh5O+zKt+NqqfvGpQ6AoicI4T7ZOgrB/Tkoa H5vG+l8p0iyaw== Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:d44b:b63b:15ee:9c1d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by bali.collaboradmins.com (Postfix) with ESMTPSA id CF70017E156D; Mon, 23 Jun 2025 17:39:37 +0200 (CEST) From: Benjamin Gaignard To: joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, nicolas.dufresne@collabora.com, jgg@ziepe.ca Cc: iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v4 2/5] dt-bindings: iommu: verisilicon: Add binding for VSI IOMMU Date: Mon, 23 Jun 2025 17:39:26 +0200 Message-ID: <20250623153931.158765-3-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250623153931.158765-1-benjamin.gaignard@collabora.com> References: <20250623153931.158765-1-benjamin.gaignard@collabora.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a device tree binding for the Verisilicon (VSI) IOMMU. This IOMMU sits in front of hardware encoder and decoder blocks on SoCs using Verisilicon IP, such as the Rockchip RK3588. Signed-off-by: Benjamin Gaignard --- changes in version 4: - rename and reorder compatibles fields. .../bindings/iommu/verisilicon,iommu.yaml | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml diff --git a/Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml b/Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml new file mode 100644 index 000000000000..d3ce9e603b61 --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/verisilicon,iommu.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iommu/verisilicon,iommu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Verisilicon IOMMU + +maintainers: + - Benjamin Gaignard + +description: |+ + A Versilicon iommu translates io virtual addresses to physical addresses for + its associated video decoder. + +properties: + compatible: + items: + - const: rockchip,rk3588-av1-iommu + - const: verisilicon,iommu-1.2 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Core clock + - description: Interface clock + + clock-names: + items: + - const: core + - const: iface + + "#iommu-cells": + const: 0 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - "#iommu-cells" + +additionalProperties: false + +examples: + - | + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + iommu@fdca0000 { + compatible = "rockchip,rk3588-av1-iommu","verisilicon,iommu-1.2"; + reg = <0x0 0xfdca0000 0x0 0x600>; + interrupts = ; + clocks = <&cru ACLK_AV1>, <&cru PCLK_AV1>; + clock-names = "core", "iface"; + #iommu-cells = <0>; + }; + }; -- 2.43.0