From: Aleksa Paunovic via B4 Relay <devnull+aleksa.paunovic.htecgroup.com@kernel.org>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Jonathan Corbet <corbet@lwn.net>
Cc: Palmer Dabbelt <palmer@sifive.com>,
Conor Dooley <conor@kernel.org>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
Subject: [PATCH v4 1/7] dt-bindings: riscv: Add xmipsexectl ISA extension description
Date: Wed, 25 Jun 2025 16:20:56 +0200 [thread overview]
Message-ID: <20250625-p8700-pause-v4-1-6c7dd7f85756@htecgroup.com> (raw)
In-Reply-To: <20250625-p8700-pause-v4-0-6c7dd7f85756@htecgroup.com>
From: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
The xmipsexectl extension is described in the MIPS RV64 P8700/P8700-F
Multiprocessing System Programmer’s Guide linked at [1].
Link: https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf
Signed-off-by: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
---
Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index ede6a58ccf5347d92785dc085a011052c1aade14..de41a6f074d3af2ceaf5293dfe75d16f43d416d6 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -662,6 +662,12 @@ properties:
Registers in the AX45MP datasheet.
https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf
+ # MIPS
+ - const: xmipsexectl
+ description:
+ The MIPS extension for execution control as documented in
+ https://mips.com/wp-content/uploads/2025/06/P8700_Programmers_Reference_Manual_Rev1.84_5-31-2025.pdf
+
# SiFive
- const: xsfvqmaccdod
description:
--
2.34.1
next prev parent reply other threads:[~2025-06-25 14:20 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-25 14:20 [PATCH v4 0/7] riscv: Add support for xmipsexectl Aleksa Paunovic via B4 Relay
2025-06-25 14:20 ` Aleksa Paunovic via B4 Relay [this message]
2025-06-26 16:35 ` [PATCH v4 1/7] dt-bindings: riscv: Add xmipsexectl ISA extension description Conor Dooley
2025-06-25 14:20 ` [PATCH v4 2/7] riscv: Add xmipsexectl as a vendor extension Aleksa Paunovic via B4 Relay
2025-07-17 8:51 ` Alexandre Ghiti
2025-06-25 14:20 ` [PATCH v4 3/7] riscv: Add xmipsexectl PAUSE instruction Aleksa Paunovic via B4 Relay
2025-07-17 8:54 ` Alexandre Ghiti
2025-06-25 14:20 ` [PATCH v4 4/7] riscv: hwprobe: Add MIPS vendor extension probing Aleksa Paunovic via B4 Relay
2025-07-17 9:01 ` Alexandre Ghiti
2025-06-25 14:21 ` [PATCH v4 5/7] riscv: hwprobe: Document MIPS xmipsexectl vendor extension Aleksa Paunovic via B4 Relay
2025-07-17 9:20 ` Alexandre Ghiti
2025-06-25 14:21 ` [PATCH v4 6/7] riscv: Add tools support for xmipsexectl Aleksa Paunovic via B4 Relay
2025-06-26 9:21 ` Andrew Jones
2025-06-26 9:34 ` Andrew Jones
2025-06-26 10:49 ` Andrew Jones
2025-06-27 8:40 ` Aleksa Paunovic
2025-06-27 11:08 ` Andrew Jones
2025-07-09 14:04 ` Aleksa Paunovic
2025-07-17 9:39 ` Alexandre Ghiti
2025-06-25 14:21 ` [PATCH v4 7/7] riscv: errata: Fix the PAUSE Opcode for MIPS P8700 Aleksa Paunovic via B4 Relay
2025-07-17 11:43 ` Alexandre Ghiti
2025-07-24 15:26 ` Aleksa Paunovic
2025-07-17 11:47 ` [PATCH v4 0/7] riscv: Add support for xmipsexectl Alexandre Ghiti
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