* [PATCH v3 1/5] dt-bindings: arm: sunxi: Add Xunlong OrangePi 4A board
2025-06-28 16:16 [PATCH v3 0/5] arm64: allwinner: t527: Add OrangePi 4A board Chen-Yu Tsai
@ 2025-06-28 16:16 ` Chen-Yu Tsai
2025-06-28 16:16 ` [PATCH v3 2/5] arm64: dts: allwinner: a523: Move mmc nodes to correct position Chen-Yu Tsai
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Chen-Yu Tsai @ 2025-06-28 16:16 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland
Cc: devicetree, linux-sunxi, linux-arm-kernel, linux-kernel,
Andre Przywara, Conor Dooley
From: Chen-Yu Tsai <wens@csie.org>
The OrangePi 4A is a typical Raspberry Pi model B sized development
board from Xunlong designed around an Allwinner T527 SoC.
Add its compatible name to the list of valid ones.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
index 7807ea613258..c41d0a0b89e6 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -996,6 +996,11 @@ properties:
- const: xunlong,orangepi-3
- const: allwinner,sun50i-h6
+ - description: Xunlong OrangePi 4A
+ items:
+ - const: xunlong,orangepi-4a
+ - const: allwinner,sun55i-t527
+
- description: Xunlong OrangePi Lite
items:
- const: xunlong,orangepi-lite
--
2.39.5
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v3 2/5] arm64: dts: allwinner: a523: Move mmc nodes to correct position
2025-06-28 16:16 [PATCH v3 0/5] arm64: allwinner: t527: Add OrangePi 4A board Chen-Yu Tsai
2025-06-28 16:16 ` [PATCH v3 1/5] dt-bindings: arm: sunxi: Add Xunlong " Chen-Yu Tsai
@ 2025-06-28 16:16 ` Chen-Yu Tsai
2025-06-28 16:16 ` [PATCH v3 3/5] arm64: dts: allwinner: a523: Move rgmii0 pins to correct location Chen-Yu Tsai
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Chen-Yu Tsai @ 2025-06-28 16:16 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland
Cc: devicetree, linux-sunxi, linux-arm-kernel, linux-kernel,
Andre Przywara
From: Chen-Yu Tsai <wens@csie.org>
When the mmc nodes were added to the dtsi file, they were inserted in
the incorrect position.
Move them to the correct place.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
.../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 126 +++++++++---------
1 file changed, 63 insertions(+), 63 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index 51cd148f4227..490f596cad6c 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -181,69 +181,6 @@ ccu: clock-controller@2001000 {
#reset-cells = <1>;
};
- mmc0: mmc@4020000 {
- compatible = "allwinner,sun55i-a523-mmc",
- "allwinner,sun20i-d1-mmc";
- reg = <0x04020000 0x1000>;
- clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
- clock-names = "ahb", "mmc";
- resets = <&ccu RST_BUS_MMC0>;
- reset-names = "ahb";
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins>;
- status = "disabled";
-
- max-frequency = <150000000>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- cap-sdio-irq;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- mmc1: mmc@4021000 {
- compatible = "allwinner,sun55i-a523-mmc",
- "allwinner,sun20i-d1-mmc";
- reg = <0x04021000 0x1000>;
- clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
- clock-names = "ahb", "mmc";
- resets = <&ccu RST_BUS_MMC1>;
- reset-names = "ahb";
- interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins>;
- status = "disabled";
-
- max-frequency = <150000000>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- cap-sdio-irq;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- mmc2: mmc@4022000 {
- compatible = "allwinner,sun55i-a523-mmc",
- "allwinner,sun20i-d1-mmc";
- reg = <0x04022000 0x1000>;
- clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
- clock-names = "ahb", "mmc";
- resets = <&ccu RST_BUS_MMC2>;
- reset-names = "ahb";
- interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&mmc2_pins>;
- status = "disabled";
-
- max-frequency = <150000000>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- cap-sdio-irq;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
wdt: watchdog@2050000 {
compatible = "allwinner,sun55i-a523-wdt";
reg = <0x2050000 0x20>;
@@ -449,6 +386,69 @@ its: msi-controller@3440000 {
};
};
+ mmc0: mmc@4020000 {
+ compatible = "allwinner,sun55i-a523-mmc",
+ "allwinner,sun20i-d1-mmc";
+ reg = <0x04020000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC0>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ status = "disabled";
+
+ max-frequency = <150000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ cap-sdio-irq;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc1: mmc@4021000 {
+ compatible = "allwinner,sun55i-a523-mmc",
+ "allwinner,sun20i-d1-mmc";
+ reg = <0x04021000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC1>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ status = "disabled";
+
+ max-frequency = <150000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ cap-sdio-irq;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ mmc2: mmc@4022000 {
+ compatible = "allwinner,sun55i-a523-mmc",
+ "allwinner,sun20i-d1-mmc";
+ reg = <0x04022000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC2>;
+ reset-names = "ahb";
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ status = "disabled";
+
+ max-frequency = <150000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ cap-sdio-irq;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
usb_otg: usb@4100000 {
compatible = "allwinner,sun55i-a523-musb",
"allwinner,sun8i-a33-musb";
--
2.39.5
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v3 3/5] arm64: dts: allwinner: a523: Move rgmii0 pins to correct location
2025-06-28 16:16 [PATCH v3 0/5] arm64: allwinner: t527: Add OrangePi 4A board Chen-Yu Tsai
2025-06-28 16:16 ` [PATCH v3 1/5] dt-bindings: arm: sunxi: Add Xunlong " Chen-Yu Tsai
2025-06-28 16:16 ` [PATCH v3 2/5] arm64: dts: allwinner: a523: Move mmc nodes to correct position Chen-Yu Tsai
@ 2025-06-28 16:16 ` Chen-Yu Tsai
2025-06-28 16:16 ` [PATCH v3 4/5] arm64: dts: allwinner: a523: Add UART1 pins Chen-Yu Tsai
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Chen-Yu Tsai @ 2025-06-28 16:16 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland
Cc: devicetree, linux-sunxi, linux-arm-kernel, linux-kernel,
Andre Przywara
From: Chen-Yu Tsai <wens@csie.org>
Nodes are supposed to be sorted by address, or if no addresses
apply, by node name. The rgmii0 pins are out of order, possibly
due to multiple patches adding pin mux settings conflicting.
Move the rgmii0 pins to the correct location.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
.../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 20 +++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index 490f596cad6c..4839411e51cf 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -126,16 +126,6 @@ pio: pinctrl@2000000 {
interrupt-controller;
#interrupt-cells = <3>;
- rgmii0_pins: rgmii0-pins {
- pins = "PH0", "PH1", "PH2", "PH3", "PH4",
- "PH5", "PH6", "PH7", "PH9", "PH10",
- "PH14", "PH15", "PH16", "PH17", "PH18";
- allwinner,pinmux = <5>;
- function = "gmac0";
- drive-strength = <40>;
- bias-disable;
- };
-
mmc0_pins: mmc0-pins {
pins = "PF0" ,"PF1", "PF2", "PF3", "PF4", "PF5";
allwinner,pinmux = <2>;
@@ -163,6 +153,16 @@ mmc2_pins: mmc2-pins {
bias-pull-up;
};
+ rgmii0_pins: rgmii0-pins {
+ pins = "PH0", "PH1", "PH2", "PH3", "PH4",
+ "PH5", "PH6", "PH7", "PH9", "PH10",
+ "PH14", "PH15", "PH16", "PH17", "PH18";
+ allwinner,pinmux = <5>;
+ function = "gmac0";
+ drive-strength = <40>;
+ bias-disable;
+ };
+
uart0_pb_pins: uart0-pb-pins {
pins = "PB9", "PB10";
allwinner,pinmux = <2>;
--
2.39.5
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v3 4/5] arm64: dts: allwinner: a523: Add UART1 pins
2025-06-28 16:16 [PATCH v3 0/5] arm64: allwinner: t527: Add OrangePi 4A board Chen-Yu Tsai
` (2 preceding siblings ...)
2025-06-28 16:16 ` [PATCH v3 3/5] arm64: dts: allwinner: a523: Move rgmii0 pins to correct location Chen-Yu Tsai
@ 2025-06-28 16:16 ` Chen-Yu Tsai
2025-06-28 16:16 ` [PATCH v3 5/5] arm64: dts: allwinner: t527: Add OrangePi 4A board Chen-Yu Tsai
2025-07-07 1:56 ` [PATCH v3 0/5] arm64: " Chen-Yu Tsai
5 siblings, 0 replies; 8+ messages in thread
From: Chen-Yu Tsai @ 2025-06-28 16:16 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland
Cc: devicetree, linux-sunxi, linux-arm-kernel, linux-kernel,
Andre Przywara
From: Chen-Yu Tsai <wens@csie.org>
UART1 is normally used to connect to the Bluetooth side of a Broadcom
WiFi+BT combo chip. The connection uses 4 pins.
Add pinmux nodes for UART1, one for the RX/TX pins, and one for the
RTS/CTS pins.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index 4839411e51cf..cf0bc39aab04 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -168,6 +168,20 @@ uart0_pb_pins: uart0-pb-pins {
allwinner,pinmux = <2>;
function = "uart0";
};
+
+ /omit-if-no-ref/
+ uart1_pins: uart1-pins {
+ pins = "PG6", "PG7";
+ function = "uart1";
+ allwinner,pinmux = <2>;
+ };
+
+ /omit-if-no-ref/
+ uart1_rts_cts_pins: uart1-rts-cts-pins {
+ pins = "PG8", "PG9";
+ function = "uart1";
+ allwinner,pinmux = <2>;
+ };
};
ccu: clock-controller@2001000 {
--
2.39.5
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v3 5/5] arm64: dts: allwinner: t527: Add OrangePi 4A board
2025-06-28 16:16 [PATCH v3 0/5] arm64: allwinner: t527: Add OrangePi 4A board Chen-Yu Tsai
` (3 preceding siblings ...)
2025-06-28 16:16 ` [PATCH v3 4/5] arm64: dts: allwinner: a523: Add UART1 pins Chen-Yu Tsai
@ 2025-06-28 16:16 ` Chen-Yu Tsai
2025-07-06 14:56 ` Andre Przywara
2025-07-07 1:56 ` [PATCH v3 0/5] arm64: " Chen-Yu Tsai
5 siblings, 1 reply; 8+ messages in thread
From: Chen-Yu Tsai @ 2025-06-28 16:16 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland
Cc: devicetree, linux-sunxi, linux-arm-kernel, linux-kernel,
Andre Przywara
From: Chen-Yu Tsai <wens@csie.org>
The OrangePi 4A is a typical Raspberry Pi model B sized development
board from Xunlong designed around an Allwinner T527 SoC.
The board has the following features:
- Allwinner T527 SoC
- AXP717B + AXP323 PMICs
- Up to 4GB LPDDR4 DRAM
- micro SD slot
- optional eMMC module
- M.2 slot for PCIe 2.0 x1
- 16 MB SPI-NOR flash
- 4x USB 2.0 type-A ports (one can be used in gadget mode)
- 1x Gigabit ethernet w/ Motorcomm PHY (through yet to be supported GMAC200)
- 3.5mm audio jack via internal audio codec
- HDMI 2.0 output
- eDP, MIPI CSI (2-lane and 4-lane) and MIPI DSI (4-lane) connectors
- USB type-C port purely for power
- AP6256 (Broadcom BCM4345) WiFi 5.0 + BT 5.0
- unsoldered headers for ADC and an additional USB 2.0 host port
- 40-pin GPIO header
Add a device tree for it, enabling all peripherals currently supported.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
Changes since v2:
- Actually include cpusldo regulator name change and axp323 aldo1/dldo1
comments
- Fix indentation of comment in usb_otg block
Changes since v1:
- Fixed regulator names for bldo3 and bldo4
- Dropped labels for aldo1, bldo3, and bldo4, which are not really used
- Added voltage constraints to aldo2, based on specifications from
schematic
- Appended "-usb-0v9" to cpusldo's regulator name
- Added comments to explain how axp323 aldo1 and dldo1 are tied together
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun55i-t527-orangepi-4a.dts | 385 ++++++++++++++++++
2 files changed, 386 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 773cc02a13d0..780aeba0f3a4 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -57,3 +57,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-sp.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun55i-a527-cubie-a5e.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun55i-h728-x96qpro+.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-avaota-a1.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-orangepi-4a.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
new file mode 100644
index 000000000000..5f97505ec8f9
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
@@ -0,0 +1,385 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+/*
+ * Copyright (C) 2025 Chen-Yu Tsai <wens@csie.org>
+ */
+
+/dts-v1/;
+
+#include "sun55i-a523.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "OrangePi 4A";
+ compatible = "xunlong,orangepi-4a", "allwinner,sun55i-t527";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ ext_osc32k: ext-osc32k-clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ /* PWM capable pin, but PWM isn't supported yet. */
+ led {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
+ };
+ };
+
+ wifi_pwrseq: pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 1 1 GPIO_ACTIVE_LOW>; /* PM1 */
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
+ clock-names = "ext_clock";
+ };
+
+ reg_otg_vbus: regulator-otg-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "otg-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <®_vcc5v>;
+ gpio = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
+ enable-active-high;
+ };
+
+ reg_pcie_vcc3v3: regulator-pcie-vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-pcie-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <®_vcc5v>;
+ gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+ enable-active-high;
+ };
+
+ reg_usb_vbus: regulator-usb-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <®_vcc5v>;
+ gpio = <&r_pio 0 12 GPIO_ACTIVE_HIGH>; /* PL12 */
+ enable-active-high;
+ };
+
+ reg_vcc5v: regulator-vcc5v {
+ /* board wide 5V supply from USB type-C port */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <®_cldo3>;
+ cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&mmc1 {
+ bus-width = <4>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ non-removable;
+ vmmc-supply = <®_dldo1_323>;
+ vqmmc-supply = <®_bldo1>;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <&r_pio>;
+ interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ bus-width = <8>;
+ cap-mmc-hw-reset;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ non-removable;
+ vmmc-supply = <®_cldo3>;
+ vqmmc-supply = <®_cldo1>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&pio {
+ vcc-pb-supply = <®_cldo3>; /* via VCC-IO */
+ vcc-pc-supply = <®_cldo1>;
+ vcc-pd-supply = <®_cldo3>;
+ vcc-pe-supply = <®_aldo2>;
+ vcc-pf-supply = <®_cldo3>; /* VCC-IO for 3.3v; VCC-MCSI for 1.8v */
+ vcc-pg-supply = <®_bldo1>;
+ vcc-ph-supply = <®_cldo3>; /* via VCC-IO */
+ vcc-pi-supply = <®_cldo3>;
+ vcc-pj-supply = <®_cldo1>;
+ vcc-pk-supply = <®_cldo1>;
+};
+
+&r_i2c0 {
+ status = "okay";
+
+ axp717: pmic@35 {
+ compatible = "x-powers,axp717";
+ reg = <0x35>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupts-extended = <&nmi_intc 0 IRQ_TYPE_LEVEL_LOW>;
+
+ vin1-supply = <®_vcc5v>;
+ vin2-supply = <®_vcc5v>;
+ vin3-supply = <®_vcc5v>;
+ vin4-supply = <®_vcc5v>;
+ aldoin-supply = <®_vcc5v>;
+ bldoin-supply = <®_vcc5v>;
+ cldoin-supply = <®_vcc5v>;
+
+ regulators {
+ /* Supplies the "little" cluster (1.4 GHz cores) */
+ reg_dcdc1: dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1160000>;
+ regulator-name = "vdd-cpul";
+ };
+
+ reg_dcdc2: dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <920000>;
+ regulator-max-microvolt = <920000>;
+ regulator-name = "vdd-gpu-sys";
+ };
+
+ reg_dcdc3: dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1160000>;
+ regulator-max-microvolt = <1160000>;
+ regulator-name = "vcc-dram";
+ };
+
+ reg_dcdc4: dcdc4 {
+ /* feeds 3.3V pin on GPIO header */
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vdd-io";
+ };
+
+ aldo1 {
+ /* not actually connected */
+ regulator-name = "avdd-csi";
+ };
+
+ reg_aldo2: aldo2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pe";
+ };
+
+ reg_aldo3: aldo3 {
+ /* supplies the I2C pins for this PMIC */
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl-usb";
+ };
+
+ reg_aldo4: aldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pll-dxco-avcc";
+ };
+
+ reg_bldo1: bldo1 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pg-wifi";
+ };
+
+ reg_bldo2: bldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-pm-lpddr";
+ };
+
+ bldo3 {
+ /* not actually connected */
+ regulator-name = "afvcc-csi";
+ };
+
+ bldo4 {
+ /* not actually connected */
+ regulator-name = "dvdd-csi";
+ };
+
+ reg_cldo1: cldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-cvp-pc-lvds-mcsi-pk-efuse-pcie-edp-1v8";
+ };
+
+ reg_cldo2: cldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3-csi";
+ };
+
+ reg_cldo3: cldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-io-mmc-nand-pd-pi-usb";
+ };
+
+ reg_cldo4: cldo4 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3-phy1-lcd";
+ };
+
+ reg_cpusldo: cpusldo {
+ /* supplies the management core */
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdd-cpus-usb-0v9";
+ };
+ };
+ };
+
+ axp323: pmic@36 {
+ compatible = "x-powers,axp323";
+ reg = <0x36>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ status = "okay";
+
+ vin1-supply = <®_vcc5v>;
+ vin2-supply = <®_vcc5v>;
+ vin3-supply = <®_vcc5v>;
+
+ regulators {
+ reg_aldo1_323: aldo1 {
+ /* less capable and shares load with dldo1 */
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+ };
+
+ reg_dldo1_323: dldo1 {
+ /* more capable and shares load with aldo1 */
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi2";
+ };
+
+ /* Supplies the "big" cluster (1.8 GHz cores) */
+ reg_dcdc1_323: dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-name = "vdd-cpub";
+ };
+
+ /* DCDC2 is polyphased with DCDC1 */
+
+ /* Some RISC-V management core related voltage */
+ reg_dcdc3_323: dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vdd-dnr";
+ };
+ };
+ };
+};
+
+&r_pio {
+/*
+ * Specifying the supply would create a circular dependency.
+ *
+ * vcc-pl-supply = <®_aldo3>;
+ */
+ vcc-pm-supply = <®_bldo2>;
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm4345c5";
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
+ clock-names = "lpo";
+ vbat-supply = <®_aldo1_323>;
+ vddio-supply = <®_bldo1>;
+ device-wakeup-gpios = <&r_pio 1 3 GPIO_ACTIVE_HIGH>; /* PM3 */
+ host-wakeup-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
+ shutdown-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
+ };
+};
+
+&usb_otg {
+ /*
+ * The OTG controller is connected to one of the type-A ports.
+ * There is a regulator, controlled by a GPIO, to provide VBUS power
+ * to the port, and a VBUSDET GPIO, to detect externally provided
+ * power. But without ID or CC pins there is no real way to do a
+ * runtime role detection.
+ */
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ usb0_vbus-supply = <®_otg_vbus>;
+ usb0_vbus_det-gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
+ usb1_vbus-supply = <®_usb_vbus>;
+ status = "okay";
+};
--
2.39.5
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v3 5/5] arm64: dts: allwinner: t527: Add OrangePi 4A board
2025-06-28 16:16 ` [PATCH v3 5/5] arm64: dts: allwinner: t527: Add OrangePi 4A board Chen-Yu Tsai
@ 2025-07-06 14:56 ` Andre Przywara
0 siblings, 0 replies; 8+ messages in thread
From: Andre Przywara @ 2025-07-06 14:56 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, devicetree, linux-sunxi,
linux-arm-kernel, linux-kernel
On Sun, 29 Jun 2025 00:16:08 +0800
Chen-Yu Tsai <wens@kernel.org> wrote:
Hi,
> From: Chen-Yu Tsai <wens@csie.org>
>
> The OrangePi 4A is a typical Raspberry Pi model B sized development
> board from Xunlong designed around an Allwinner T527 SoC.
>
> The board has the following features:
> - Allwinner T527 SoC
> - AXP717B + AXP323 PMICs
> - Up to 4GB LPDDR4 DRAM
> - micro SD slot
> - optional eMMC module
> - M.2 slot for PCIe 2.0 x1
> - 16 MB SPI-NOR flash
> - 4x USB 2.0 type-A ports (one can be used in gadget mode)
> - 1x Gigabit ethernet w/ Motorcomm PHY (through yet to be supported GMAC200)
> - 3.5mm audio jack via internal audio codec
> - HDMI 2.0 output
> - eDP, MIPI CSI (2-lane and 4-lane) and MIPI DSI (4-lane) connectors
> - USB type-C port purely for power
> - AP6256 (Broadcom BCM4345) WiFi 5.0 + BT 5.0
> - unsoldered headers for ADC and an additional USB 2.0 host port
> - 40-pin GPIO header
>
> Add a device tree for it, enabling all peripherals currently supported.
Looks good to me now, thanks for the changes!
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cheers,
Andre
> ---
> Changes since v2:
> - Actually include cpusldo regulator name change and axp323 aldo1/dldo1
> comments
> - Fix indentation of comment in usb_otg block
>
> Changes since v1:
> - Fixed regulator names for bldo3 and bldo4
> - Dropped labels for aldo1, bldo3, and bldo4, which are not really used
> - Added voltage constraints to aldo2, based on specifications from
> schematic
> - Appended "-usb-0v9" to cpusldo's regulator name
> - Added comments to explain how axp323 aldo1 and dldo1 are tied together
> ---
> arch/arm64/boot/dts/allwinner/Makefile | 1 +
> .../dts/allwinner/sun55i-t527-orangepi-4a.dts | 385 ++++++++++++++++++
> 2 files changed, 386 insertions(+)
> create mode 100644 arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
>
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> index 773cc02a13d0..780aeba0f3a4 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -57,3 +57,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h700-anbernic-rg35xx-sp.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun55i-a527-cubie-a5e.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun55i-h728-x96qpro+.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-avaota-a1.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun55i-t527-orangepi-4a.dtb
> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
> new file mode 100644
> index 000000000000..5f97505ec8f9
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts
> @@ -0,0 +1,385 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
> +/*
> + * Copyright (C) 2025 Chen-Yu Tsai <wens@csie.org>
> + */
> +
> +/dts-v1/;
> +
> +#include "sun55i-a523.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +
> +/ {
> + model = "OrangePi 4A";
> + compatible = "xunlong,orangepi-4a", "allwinner,sun55i-t527";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + ext_osc32k: ext-osc32k-clk {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <32768>;
> + clock-output-names = "ext_osc32k";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + /* PWM capable pin, but PWM isn't supported yet. */
> + led {
> + function = LED_FUNCTION_STATUS;
> + color = <LED_COLOR_ID_GREEN>;
> + gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
> + };
> + };
> +
> + wifi_pwrseq: pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&r_pio 1 1 GPIO_ACTIVE_LOW>; /* PM1 */
> + clocks = <&rtc CLK_OSC32K_FANOUT>;
> + clock-names = "ext_clock";
> + };
> +
> + reg_otg_vbus: regulator-otg-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "otg-vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <®_vcc5v>;
> + gpio = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
> + enable-active-high;
> + };
> +
> + reg_pcie_vcc3v3: regulator-pcie-vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc-pcie-3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <®_vcc5v>;
> + gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
> + enable-active-high;
> + };
> +
> + reg_usb_vbus: regulator-usb-vbus {
> + compatible = "regulator-fixed";
> + regulator-name = "usb-vbus";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <®_vcc5v>;
> + gpio = <&r_pio 0 12 GPIO_ACTIVE_HIGH>; /* PL12 */
> + enable-active-high;
> + };
> +
> + reg_vcc5v: regulator-vcc5v {
> + /* board wide 5V supply from USB type-C port */
> + compatible = "regulator-fixed";
> + regulator-name = "vcc-5v";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + };
> +};
> +
> +&ehci0 {
> + status = "okay";
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&mmc0 {
> + vmmc-supply = <®_cldo3>;
> + cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */
> + bus-width = <4>;
> + status = "okay";
> +};
> +
> +&mmc1 {
> + bus-width = <4>;
> + mmc-pwrseq = <&wifi_pwrseq>;
> + non-removable;
> + vmmc-supply = <®_dldo1_323>;
> + vqmmc-supply = <®_bldo1>;
> + status = "okay";
> +
> + brcmf: wifi@1 {
> + compatible = "brcm,bcm4329-fmac";
> + reg = <1>;
> + interrupt-parent = <&r_pio>;
> + interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */
> + interrupt-names = "host-wake";
> + };
> +};
> +
> +&mmc2 {
> + bus-width = <8>;
> + cap-mmc-hw-reset;
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + non-removable;
> + vmmc-supply = <®_cldo3>;
> + vqmmc-supply = <®_cldo1>;
> + status = "okay";
> +};
> +
> +&ohci0 {
> + status = "okay";
> +};
> +
> +&ohci1 {
> + status = "okay";
> +};
> +
> +&pio {
> + vcc-pb-supply = <®_cldo3>; /* via VCC-IO */
> + vcc-pc-supply = <®_cldo1>;
> + vcc-pd-supply = <®_cldo3>;
> + vcc-pe-supply = <®_aldo2>;
> + vcc-pf-supply = <®_cldo3>; /* VCC-IO for 3.3v; VCC-MCSI for 1.8v */
> + vcc-pg-supply = <®_bldo1>;
> + vcc-ph-supply = <®_cldo3>; /* via VCC-IO */
> + vcc-pi-supply = <®_cldo3>;
> + vcc-pj-supply = <®_cldo1>;
> + vcc-pk-supply = <®_cldo1>;
> +};
> +
> +&r_i2c0 {
> + status = "okay";
> +
> + axp717: pmic@35 {
> + compatible = "x-powers,axp717";
> + reg = <0x35>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupts-extended = <&nmi_intc 0 IRQ_TYPE_LEVEL_LOW>;
> +
> + vin1-supply = <®_vcc5v>;
> + vin2-supply = <®_vcc5v>;
> + vin3-supply = <®_vcc5v>;
> + vin4-supply = <®_vcc5v>;
> + aldoin-supply = <®_vcc5v>;
> + bldoin-supply = <®_vcc5v>;
> + cldoin-supply = <®_vcc5v>;
> +
> + regulators {
> + /* Supplies the "little" cluster (1.4 GHz cores) */
> + reg_dcdc1: dcdc1 {
> + regulator-always-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <1160000>;
> + regulator-name = "vdd-cpul";
> + };
> +
> + reg_dcdc2: dcdc2 {
> + regulator-always-on;
> + regulator-min-microvolt = <920000>;
> + regulator-max-microvolt = <920000>;
> + regulator-name = "vdd-gpu-sys";
> + };
> +
> + reg_dcdc3: dcdc3 {
> + regulator-always-on;
> + regulator-min-microvolt = <1160000>;
> + regulator-max-microvolt = <1160000>;
> + regulator-name = "vcc-dram";
> + };
> +
> + reg_dcdc4: dcdc4 {
> + /* feeds 3.3V pin on GPIO header */
> + regulator-always-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vdd-io";
> + };
> +
> + aldo1 {
> + /* not actually connected */
> + regulator-name = "avdd-csi";
> + };
> +
> + reg_aldo2: aldo2 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc-pe";
> + };
> +
> + reg_aldo3: aldo3 {
> + /* supplies the I2C pins for this PMIC */
> + regulator-always-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc-pl-usb";
> + };
> +
> + reg_aldo4: aldo4 {
> + regulator-always-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc-pll-dxco-avcc";
> + };
> +
> + reg_bldo1: bldo1 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc-pg-wifi";
> + };
> +
> + reg_bldo2: bldo2 {
> + regulator-always-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc-pm-lpddr";
> + };
> +
> + bldo3 {
> + /* not actually connected */
> + regulator-name = "afvcc-csi";
> + };
> +
> + bldo4 {
> + /* not actually connected */
> + regulator-name = "dvdd-csi";
> + };
> +
> + reg_cldo1: cldo1 {
> + regulator-always-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc-cvp-pc-lvds-mcsi-pk-efuse-pcie-edp-1v8";
> + };
> +
> + reg_cldo2: cldo2 {
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc3v3-csi";
> + };
> +
> + reg_cldo3: cldo3 {
> + regulator-always-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc-io-mmc-nand-pd-pi-usb";
> + };
> +
> + reg_cldo4: cldo4 {
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc-3v3-phy1-lcd";
> + };
> +
> + reg_cpusldo: cpusldo {
> + /* supplies the management core */
> + regulator-always-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + regulator-name = "vdd-cpus-usb-0v9";
> + };
> + };
> + };
> +
> + axp323: pmic@36 {
> + compatible = "x-powers,axp323";
> + reg = <0x36>;
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + status = "okay";
> +
> + vin1-supply = <®_vcc5v>;
> + vin2-supply = <®_vcc5v>;
> + vin3-supply = <®_vcc5v>;
> +
> + regulators {
> + reg_aldo1_323: aldo1 {
> + /* less capable and shares load with dldo1 */
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc-wifi";
> + };
> +
> + reg_dldo1_323: dldo1 {
> + /* more capable and shares load with aldo1 */
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc-wifi2";
> + };
> +
> + /* Supplies the "big" cluster (1.8 GHz cores) */
> + reg_dcdc1_323: dcdc1 {
> + regulator-always-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <1150000>;
> + regulator-name = "vdd-cpub";
> + };
> +
> + /* DCDC2 is polyphased with DCDC1 */
> +
> + /* Some RISC-V management core related voltage */
> + reg_dcdc3_323: dcdc3 {
> + regulator-always-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + regulator-name = "vdd-dnr";
> + };
> + };
> + };
> +};
> +
> +&r_pio {
> +/*
> + * Specifying the supply would create a circular dependency.
> + *
> + * vcc-pl-supply = <®_aldo3>;
> + */
> + vcc-pm-supply = <®_bldo2>;
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pb_pins>;
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
> + uart-has-rtscts;
> + status = "okay";
> +
> + bluetooth {
> + compatible = "brcm,bcm4345c5";
> + clocks = <&rtc CLK_OSC32K_FANOUT>;
> + clock-names = "lpo";
> + vbat-supply = <®_aldo1_323>;
> + vddio-supply = <®_bldo1>;
> + device-wakeup-gpios = <&r_pio 1 3 GPIO_ACTIVE_HIGH>; /* PM3 */
> + host-wakeup-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */
> + shutdown-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
> + };
> +};
> +
> +&usb_otg {
> + /*
> + * The OTG controller is connected to one of the type-A ports.
> + * There is a regulator, controlled by a GPIO, to provide VBUS power
> + * to the port, and a VBUSDET GPIO, to detect externally provided
> + * power. But without ID or CC pins there is no real way to do a
> + * runtime role detection.
> + */
> + dr_mode = "host";
> + status = "okay";
> +};
> +
> +&usbphy {
> + usb0_vbus-supply = <®_otg_vbus>;
> + usb0_vbus_det-gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
> + usb1_vbus-supply = <®_usb_vbus>;
> + status = "okay";
> +};
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v3 0/5] arm64: allwinner: t527: Add OrangePi 4A board
2025-06-28 16:16 [PATCH v3 0/5] arm64: allwinner: t527: Add OrangePi 4A board Chen-Yu Tsai
` (4 preceding siblings ...)
2025-06-28 16:16 ` [PATCH v3 5/5] arm64: dts: allwinner: t527: Add OrangePi 4A board Chen-Yu Tsai
@ 2025-07-07 1:56 ` Chen-Yu Tsai
5 siblings, 0 replies; 8+ messages in thread
From: Chen-Yu Tsai @ 2025-07-07 1:56 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jernej Skrabec,
Samuel Holland, Chen-Yu Tsai
Cc: devicetree, linux-sunxi, linux-arm-kernel, linux-kernel,
Andre Przywara
On Sun, 29 Jun 2025 00:16:03 +0800, Chen-Yu Tsai wrote:
> This is v3 of my OrangePi 4A series.
>
> Changes since v2:
> - Actually include cpusldo regulator name change and axp323 aldo1/dldo1
> comments
> - Fix indentation of comment in usb_otg block
> - Link to v2:
> https://lore.kernel.org/all/20250625131652.1667345-1-wens@kernel.org/
>
> [...]
Applied to sunxi/dt-for-6.17 in local tree, thanks!
[1/5] dt-bindings: arm: sunxi: Add Xunlong OrangePi 4A board
commit: bbe7cf4bab161a50ce631c9dd7724df333cdf12d
[2/5] arm64: dts: allwinner: a523: Move mmc nodes to correct position
commit: 6e2662c07a90e9f782158b7d6eda2766f65e9c36
[3/5] arm64: dts: allwinner: a523: Move rgmii0 pins to correct location
commit: 84c4a16e00f5aadbb1a3bdecc6bbfee35b7c45c8
[4/5] arm64: dts: allwinner: a523: Add UART1 pins
commit: 64f2f7bc4acb7928b39cac4a9a932e77b966f31c
[5/5] arm64: dts: allwinner: t527: Add OrangePi 4A board
commit: de713ccb99345be302adf507274d1b190dd2302e
Best regards,
--
Chen-Yu Tsai <wens@csie.org>
^ permalink raw reply [flat|nested] 8+ messages in thread