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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Andre Przywara Subject: [PATCH RFT net-next 0/10] net: stmmac: Add support for Allwinner A523 GMAC200 Date: Wed, 2 Jul 2025 00:57:46 +0800 Message-Id: <20250701165756.258356-1-wens@kernel.org> X-Mailer: git-send-email 2.39.5 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Chen-Yu Tsai Hi everyone, This series adds support for the second Ethernet controller found on the Allwinner A523 SoC family. This controller, dubbed GMAC200, is a DWMAC4 core with an integration layer around it. The integration layer is similar to older Allwinner generations, but with an extra memory bus gate and separate power domain. The series stacks on top of three other series inflight: - Orangepi 4A series https://lore.kernel.org/all/20250628161608.3072968-1-wens@kernel.org/ - A523 power controller support series https://lore.kernel.org/all/20250627152918.2606728-1-wens@kernel.org/ - Rename emac0 to gmac0 for A523 series https://lore.kernel.org/all/20250628054438.2864220-1-wens@kernel.org/ Patch 1 adds a new compatible string combo to the existing Allwinner EMAC binding. Patch 2 adds a new driver for this core and integration combo. Patch 3 extends the sunxi SRAM driver to allow access to the clock delay controls for the second Ethernet controller. Patch 4 registers the special regmap for the clock delay controls as a syscon. This allows the new network driver to use the syscon interface, instead of the following dance which the existing dwmac-sun8i driver does: of_parse_phandle(); of_find_device_by_node(); dev_get_regmap(); With this change in place we can also drop the above from the dwmac-sun8i driver. Patch 5 adds a device node and pinmux settings for the GMAC200. Patches 6 and 8 add missing Ethernet PHY reset settings for the already enabled controller. Patches 7, 9, and 10 enable the GMAC200 on three boards. I only have the Orangepi 4A, so I am asking for people to help test the two other boards. The RX/TX clock delay settings were taken from their respective BSPs, though those numbers don't always work, as is was the case for the Orangepi 4A. Please have a look and help test. Patches 1 and 2 should go through net-next, and I will take all the other patches through the sunxi tree. Thanks ChenYu Chen-Yu Tsai (10): dt-bindings: net: sun8i-emac: Add A523 GMAC200 compatible net: stmmac: Add support for Allwinner A523 GMAC200 soc: sunxi: sram: add entry for a523 soc: sunxi: sram: register regmap as syscon arm64: dts: allwinner: a523: Add GMAC200 ethernet controller arm64: dts: allwinner: a527: cubie-a5e: Add ethernet PHY reset setting arm64: dts: allwinner: a527: cubie-a5e: Enable second Ethernet port arm64: dts: allwinner: t527: avaota-a1: Add ethernet PHY reset setting arm64: dts: allwinner: t527: avaota-a1: enable second Ethernet port arm64: dts: allwinner: t527: orangepi-4a: Enable Ethernet port .../net/allwinner,sun8i-a83t-emac.yaml | 68 +++++++- .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 55 ++++++ .../dts/allwinner/sun55i-a527-cubie-a5e.dts | 29 +++- .../dts/allwinner/sun55i-t527-avaota-a1.dts | 29 +++- .../dts/allwinner/sun55i-t527-orangepi-4a.dts | 23 +++ drivers/net/ethernet/stmicro/stmmac/Kconfig | 12 ++ drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../ethernet/stmicro/stmmac/dwmac-sun55i.c | 161 ++++++++++++++++++ drivers/soc/sunxi/sunxi_sram.c | 14 ++ 9 files changed, 386 insertions(+), 6 deletions(-) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c -- 2.39.5