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From: Paul Kocialkowski <paulk@sys-base.io>
To: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-gpio@vger.kernel.org
Cc: Yong Deng <yong.deng@magewell.com>,
	Paul Kocialkowski <paulk@sys-base.io>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Samuel Holland <samuel@sholland.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Maxime Ripard <mripard@kernel.org>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Linus Walleij <linus.walleij@linaro.org>,
	Icenowy Zheng <icenowy@aosc.xyz>,
	Andre Przywara <andre.przywara@arm.com>
Subject: [PATCH 1/5] pinctrl: sunxi: v3s: Fix wrong comment about UART2 pinmux
Date: Tue,  1 Jul 2025 22:11:20 +0200	[thread overview]
Message-ID: <20250701201124.812882-2-paulk@sys-base.io> (raw)
In-Reply-To: <20250701201124.812882-1-paulk@sys-base.io>

The original comment doesn't match the pin attribution, probably due
to a hasty copy/paste.

Signed-off-by: Paul Kocialkowski <paulk@sys-base.io>
---
 drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
index 696d7dd8d87b..2e3bd36a4410 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
@@ -45,7 +45,7 @@ static const struct sunxi_desc_pin sun8i_v3s_pins[] = {
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
 		  SUNXI_FUNCTION(0x1, "gpio_out"),
-		  SUNXI_FUNCTION(0x2, "uart2"),		/* D1 */
+		  SUNXI_FUNCTION(0x2, "uart2"),		/* CTS */
 		  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),	/* PB_EINT3 */
 	SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
 		  SUNXI_FUNCTION(0x0, "gpio_in"),
-- 
2.49.0


  reply	other threads:[~2025-07-01 20:14 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-01 20:11 [PATCH 0/5] sunxi: Various minor V3s clock/pinctrl fixes Paul Kocialkowski
2025-07-01 20:11 ` Paul Kocialkowski [this message]
2025-07-02  3:04   ` [PATCH 1/5] pinctrl: sunxi: v3s: Fix wrong comment about UART2 pinmux Icenowy Zheng
2025-07-02  7:21   ` Chen-Yu Tsai
2025-07-04  8:01   ` Linus Walleij
2025-07-01 20:11 ` [PATCH 2/5] clk: sunxi-ng: v3s: Fix CSI SCLK clock name Paul Kocialkowski
2025-07-02  3:08   ` Icenowy Zheng
2025-07-01 20:11 ` [PATCH 3/5] clk: sunxi-ng: v3s: Fix CSI1 MCLK " Paul Kocialkowski
2025-07-02  3:10   ` Icenowy Zheng
2025-07-01 20:11 ` [PATCH 4/5] clk: sunxi-ng: v3s: Fix TCON clock parents Paul Kocialkowski
2025-07-01 20:11 ` [PATCH 5/5] drm/sun4i: Run the mixer clock at 297 MHz on V3s Paul Kocialkowski
2025-07-02  2:52   ` Icenowy Zheng
2025-07-02 11:36   ` Maxime Ripard
2025-07-02 12:15     ` Paul Kocialkowski
2025-07-03 15:37 ` (subset) [PATCH 0/5] sunxi: Various minor V3s clock/pinctrl fixes Chen-Yu Tsai

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