From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from relay.smtp-ext.broadcom.com (relay.smtp-ext.broadcom.com [192.19.144.207]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A06C7309A75; Wed, 2 Jul 2025 17:56:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.19.144.207 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751478994; cv=none; b=SPVhC3ae/q+XG25CI0kCUxfI2sbHBkhRLf+Yt9MVZg3/t9SvSc8wZnTH+O+5wROqSTvD8oxpC4lLBiLMnjWigtLBRzz15kG7nldy+zTte9aOfhaZuPbhbR84F09IhUZMPcD0yDjFL0IG82WoxEpbPaVl+luW9vzCiUWOLf9OS2k= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751478994; c=relaxed/simple; bh=2JufP1vE8BWmTAgWOhaC6QCXSRwArHKrkTbWIH5lo3k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DwXFtH6qjoQz/IKN8mFIj5vcLmbaXknV52WZzUZkvCfg09h19QWxsY6xyjmn7fvczwt/m65RAxlLSE37p62aMlLLvJ2XL0dQ1mIy2YKk/0t0AR8HsDovFCb5yvqgd0zBE8VsRkdUTk2itcVLdYU7WLanaQ9jY4NY6uLJ1tmIRIg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com; spf=fail smtp.mailfrom=broadcom.com; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b=K6gmh1XI; arc=none smtp.client-ip=192.19.144.207 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=broadcom.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="K6gmh1XI" Received: from mail-lvn-it-01.broadcom.com (mail-lvn-it-01.lvn.broadcom.net [10.36.132.253]) by relay.smtp-ext.broadcom.com (Postfix) with ESMTP id BB7CBC0005DE; Wed, 2 Jul 2025 10:56:25 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com BB7CBC0005DE DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1751478985; bh=2JufP1vE8BWmTAgWOhaC6QCXSRwArHKrkTbWIH5lo3k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=K6gmh1XIas7rreYOGWF7e3SvInmhH2x5EqJ8fTop24IEcvYAba46WnkVkN7rc6yEp /uUZ3+WYmmWIKQ774jCOcjs0taXYigqQJHmXMu/tqDcjSA1Mn8gtwsBqtWTK2CDov7 hXnDTHl3HihzK5EDb1UDRtMuy552ayRhE5gSuj1I= Received: from fainelli-desktop.igp.broadcom.net (fainelli-desktop.dhcp.broadcom.net [10.67.48.245]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail-lvn-it-01.broadcom.com (Postfix) with ESMTPSA id 30F1118000A5F; Wed, 2 Jul 2025 10:56:25 -0700 (PDT) From: Florian Fainelli To: bcm-kernel-feedback-list@broadcom.com, Andrea della Porta , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Lorenzo Pieralisi , Krzysztof Wilczynski , Bjorn Helgaas , Linus Walleij , Catalin Marinas , Will Deacon , Bartosz Golaszewski , Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Greg Kroah-Hartman , Saravana Kannan , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-gpio@vger.kernel.org, Masahiro Yamada , Stefan Wahren , Herve Codina , Luca Ceresoli , Thomas Petazzoni , Andrew Lunn , Phil Elwell , Dave Stevenson , kernel-list@raspberrypi.com, Matthias Brugger Cc: Florian Fainelli Subject: Re: [PATCH v2 stblinux/next 2/2] clk: rp1: Implement remaining clock tree Date: Wed, 2 Jul 2025 10:56:24 -0700 Message-ID: <20250702175624.1714748-1-florian.fainelli@broadcom.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <17e5c6e0c085cfa0bf4b63b639cdc92c6a4c1418.1750714412.git.andrea.porta@suse.com> References: <17e5c6e0c085cfa0bf4b63b639cdc92c6a4c1418.1750714412.git.andrea.porta@suse.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Florian Fainelli On Mon, 23 Jun 2025 23:46:28 +0200, Andrea della Porta wrote: > The RP1 clock generator driver currently defines only the fundamental > clocks such as the front PLLs for system, audio and video subsystems > and the ethernet clock. > > Add the remaining clocks to the tree so as to be completed, which means > that the following RP1 peripherals could now consume their specific clocks > and be enabled to work (provided that the relevant driver changes for each > specific peripheral, if any, are committed): > > - ADC > - Audio IN/OUT > - DMA controller > - I2S > - MIPI DPI/DSI > - PWM > - SDIO > - UART > - Video Encoder > > Signed-off-by: Andrea della Porta > --- Applied to https://github.com/Broadcom/stblinux/commits/drivers/next, thanks! -- Florian