From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CFEB92E3AE1; Thu, 3 Jul 2025 10:26:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751538362; cv=none; b=NUXwIm7gN9SORmKUlOvcavahtX7WTrnC/RZAeUI4xUO9us/QH7zrkHbol40mp5/dPd2nWhrR9d+aepkaFQBd3Q9nblDV9aVW2PpYoP1qBhM+Zl3Sy9VJDydwG3bYy9txCwkIdq17vv9TnEfpduPp3xpUPcnegMVnNfdGjLL0B9c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751538362; c=relaxed/simple; bh=snToJzWBwiqETy97af5AraNsbwKzWEb8CWlj1NZAE/Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=g/9aQM5MzfK+20hVki/wTuHuwy6JIpWoYOxIjJbUGpy/h1HkcFHC5vPO7kWDP0o7FFi0qBq+b/mutZ/Iwco8ZYpRFalZIGc9qZpaGY+6PnW1yLI01WDaLbu4qte0jXnHStY+Jl5+p7fTvT96w92QGB1QYB2CyHXIbmhvImQyIys= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=CPSdufoo; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="CPSdufoo" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2B51BC4CEE3; Thu, 3 Jul 2025 10:25:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1751538362; bh=snToJzWBwiqETy97af5AraNsbwKzWEb8CWlj1NZAE/Q=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=CPSdufooijXPxj+sZpjO1Uil8oQYybqMJbePojr2rdcDe4QCrcNTQCtadUI8kw563 wCL7QxFtuV+1+YNbspnIrunssDUZcdFH4kfDd0srBLPoOTyjStaUzhwkqE5bzrc9GQ iHjc4jUuCk0C2zUClMqmtW5grZZE2I+T+6zh7s+F39CIEpaX59L59vu0DoxPAkyyUO 0pFEYMCzwDbAXTisLNTxwR/1a598AlaulURXrs7HTcg2QSFVJh4m0ietkgcVW7hmFe crSXB4XU4fUQhOw/mqVtbP9c/hTxADuIdwhwZCJXYiaCIqND/zdomjtlv30Wr5hE1W SMTi1JtGmBQ6g== From: Lorenzo Pieralisi Date: Thu, 03 Jul 2025 12:24:59 +0200 Subject: [PATCH v7 09/31] arm64/sysreg: Add ICC_CR0_EL1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250703-gicv5-host-v7-9-12e71f1b3528@kernel.org> References: <20250703-gicv5-host-v7-0-12e71f1b3528@kernel.org> In-Reply-To: <20250703-gicv5-host-v7-0-12e71f1b3528@kernel.org> To: Marc Zyngier , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon Cc: Arnd Bergmann , Sascha Bischoff , Jonathan Cameron , Timothy Hayes , Bjorn Helgaas , "Liam R. Howlett" , Peter Maydell , Mark Rutland , Jiri Slaby , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, Lorenzo Pieralisi X-Mailer: b4 0.15-dev-6f78e Add ICC_CR0_EL1 register description. Signed-off-by: Lorenzo Pieralisi Reviewed-by: Jonathan Cameron Reviewed-by: Marc Zyngier Cc: Will Deacon Cc: Catalin Marinas Cc: Marc Zyngier --- arch/arm64/tools/sysreg | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 78a51fbf3a99..ebbb22ed2301 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -3519,6 +3519,14 @@ Res0 14:12 Field 11:0 AFFINITY EndSysreg +Sysreg ICC_CR0_EL1 3 1 12 0 1 +Res0 63:39 +Field 38 PID +Field 37:32 IPPT +Res0 31:1 +Field 0 EN +EndSysreg + Sysreg CSSELR_EL1 3 2 0 0 0 Res0 63:5 Field 4 TnD -- 2.48.0