Re: [PATCH v3 10/12] spi: offload trigger: add ADI Util Sigma-Delta SPI driver

David Lechner
2025-07-02T12:38:00Z

On 7/2/25 2:57 AM, Nuno Sá wrote:
> On Tue, 2025-07-01 at 16:37 -0500, David Lechner wrote:
>> Add a new driver for the ADI Util Sigma-Delta SPI FPGA IP core.
>>
>> This is used to trigger a SPI offload based on a RDY signal from an ADC
>> while masking out other signals on the same line.
>>
>> Signed-off-by: David Lechner <dlechner@baylibre.com>
>> ---

---

>> +static int adi_util_sigma_delta_probe(struct platform_device *pdev)
>> +{
>> + struct device *dev = &pdev->dev;
>> + struct spi_offload_trigger_info info = {
>> + .fwnode = dev_fwnode(dev),
>> + .ops = &adi_util_sigma_delta_ops,
>> + };
>> + struct clk *clk;
>> +
>> + clk = devm_clk_get_enabled(dev, NULL);
>> + if (IS_ERR(clk))
>> + return dev_err_probe(dev, PTR_ERR(clk), "Failed to get
>> clock\n");
>> +
>
> Small nit. Did you consider enabling/disabling the clock on the trigger
> enable()/disable() callback? I guess the ref clk will be enabled anyways by
> someone else but conceptually kind of makes sense to enable the resource only
> when needed.
>
> Not a big deal (at least to me).
>
> - Nuno Sá
>

I thought about it, but we don't do that for any other FPGA IP cores
so I didn't do it here either.

Since they all use the same AXI clock anyway, disabling the clock
here probably doesn't have any effect in practice since there will
always be other users of the same clock keeping it enabled.