From: Keguang Zhang via B4 Relay <devnull+keguang.zhang.gmail.com@kernel.org>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Keguang Zhang <keguang.zhang@gmail.com>
Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 8/9] MIPS: Unify Loongson1 PRID_REV
Date: Wed, 09 Jul 2025 19:05:59 +0800 [thread overview]
Message-ID: <20250709-loongson1-arch-v2-8-bcff6e518c09@gmail.com> (raw)
In-Reply-To: <20250709-loongson1-arch-v2-0-bcff6e518c09@gmail.com>
From: Keguang Zhang <keguang.zhang@gmail.com>
LS1B and LS1C share the same PRID value, so unify them
into a single definition: PRID_REV_LOONGSON1.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
---
arch/mips/include/asm/cpu.h | 3 +--
arch/mips/kernel/cpu-probe.c | 6 +++---
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index ecb9854cb432..4163b22c0a9a 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -248,8 +248,7 @@
#define PRID_REV_VR4181A 0x0070 /* Same as VR4122 */
#define PRID_REV_VR4130 0x0080
#define PRID_REV_34K_V1_0_2 0x0022
-#define PRID_REV_LOONGSON1B 0x0020
-#define PRID_REV_LOONGSON1C 0x0020 /* Same as Loongson-1B */
+#define PRID_REV_LOONGSON1 0x0020
#define PRID_REV_LOONGSON2E 0x0002
#define PRID_REV_LOONGSON2F 0x0003
#define PRID_REV_LOONGSON2K_R1_0 0x0000
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index af7412549e6e..ca1ab765d4ac 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1286,14 +1286,14 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
set_cpu_asid_mask(c, MIPS_ENTRYHI_ASID);
c->writecombine = _CACHE_UNCACHED_ACCELERATED;
break;
- case PRID_IMP_LOONGSON_32: /* Loongson-1 */
+ case PRID_IMP_LOONGSON_32:
decode_configs(c);
c->cputype = CPU_LOONGSON32;
switch (c->processor_id & PRID_REV_MASK) {
- case PRID_REV_LOONGSON1B:
- __cpu_name[cpu] = "Loongson 1B";
+ case PRID_REV_LOONGSON1:
+ __cpu_name[cpu] = "ICT Loongson-1";
break;
}
--
2.43.0
next prev parent reply other threads:[~2025-07-09 11:07 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-09 11:05 [PATCH v2 0/9] MIPS: loongson32: Convert all platform devices to DT Keguang Zhang via B4 Relay
2025-07-09 11:05 ` [PATCH v2 1/9] dt-bindings: mips: loongson: Add LS1B demo board Keguang Zhang via B4 Relay
2025-07-10 12:21 ` Krzysztof Kozlowski
2025-07-09 11:05 ` [PATCH v2 2/9] dt-bindings: mips: loongson: Add CQ-T300B board Keguang Zhang via B4 Relay
2025-07-10 12:22 ` Krzysztof Kozlowski
2025-07-11 2:38 ` Keguang Zhang
2025-07-09 11:05 ` [PATCH v2 3/9] MIPS: dts: loongson: Add LS1B-DEMO board Keguang Zhang via B4 Relay
2025-07-10 12:27 ` Krzysztof Kozlowski
2025-07-16 9:41 ` Keguang Zhang
2025-07-09 11:05 ` [PATCH v2 4/9] MIPS: dts: loongson: Add LSGZ_1B_DEV board Keguang Zhang via B4 Relay
2025-07-10 12:28 ` Krzysztof Kozlowski
2025-07-16 9:45 ` Keguang Zhang
2025-07-09 11:05 ` [PATCH v2 5/9] MIPS: dts: loongson: Add Smartloong-1C board Keguang Zhang via B4 Relay
2025-07-09 11:05 ` [PATCH v2 6/9] MIPS: dts: loongson: Add CQ-T300B board Keguang Zhang via B4 Relay
2025-07-09 11:05 ` [PATCH v2 7/9] MIPS: loongson32: Switch to generic kernel Keguang Zhang via B4 Relay
2025-07-09 11:05 ` Keguang Zhang via B4 Relay [this message]
2025-07-09 11:06 ` [PATCH v2 9/9] MIPS: configs: Consolidate Loongson1 defconfigs Keguang Zhang via B4 Relay
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