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Wed, 09 Jul 2025 03:09:49 -0700 (PDT) Received: from [127.0.0.2] ([2a02:2454:ff21:ef41:d3be:a88a:dbb9:f905]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-454d5032997sm18342105e9.7.2025.07.09.03.09.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Jul 2025 03:09:49 -0700 (PDT) From: Stephan Gerhold Subject: [PATCH v2 0/6] clk: qcom: Add video clock controller and resets for X1E80100 Date: Wed, 09 Jul 2025 12:08:52 +0200 Message-Id: <20250709-x1e-videocc-v2-0-ad1acf5674b4@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIALQ/bmgC/23MywrCMBCF4VcpszaSizHqyveQLmoyaQekKRMJl ZJ3N3bt8j9wvg0yMmGGW7cBY6FMaW6hDx34aZhHFBRag5baSieVWBWKQgGT90LJqKLW1p3OBtp jYYy07tqjbz1Rfif+7HhRv/W/U5SQwl1sMFfzRCv1/UXzwOmYeIS+1voFWebgl6cAAAA= X-Change-ID: 20250701-x1e-videocc-10f1f2257463 To: Bjorn Andersson Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Jagadeesh Kona , Konrad Dybcio , Abel Vesa , Johan Hovold , Bryan O'Donoghue , Stefan Schmidt , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 In preparation of adding iris (video acceleration) for Qualcomm X1E80100, enable support for the video clock controller and additional needed reset controls. Since iris in X1E is largely identical to SM8550, reuse the existing videocc-sm8550 driver with slightly adjusted PLL frequencies and adapt the reset definitions from the SM8550 GCC driver. Signed-off-by: Stephan Gerhold --- Changes in v2: - Fix commit message of PATCH 5/6 (reset definitions are just copied as-is from gcc-sm8550 actually) (Konrad) - PATCH 6/6: Use GCC_VIDEO_AHB for videocc instead of GCC_QMIP_VIDEO_VCODEC_AHB_CLK (Konrad) - Link to v1: https://lore.kernel.org/r/20250701-x1e-videocc-v1-0-785d393be502@linaro.org --- Stephan Gerhold (6): dt-bindings: clock: qcom,sm8450-videocc: Document X1E80100 compatible clk: qcom: videocc-sm8550: Allow building without SM8550/SM8560 GCC clk: qcom: videocc-sm8550: Add separate frequency tables for X1E80100 dt-bindings: clock: qcom,x1e80100-gcc: Add missing video resets clk: qcom: gcc-x1e80100: Add missing video resets arm64: dts: qcom: x1e80100: Add videocc .../bindings/clock/qcom,sm8450-videocc.yaml | 1 + arch/arm64/boot/dts/qcom/x1e80100.dtsi | 15 +++++++++++ drivers/clk/qcom/Kconfig | 3 +-- drivers/clk/qcom/gcc-x1e80100.c | 2 ++ drivers/clk/qcom/videocc-sm8550.c | 29 ++++++++++++++++++++++ include/dt-bindings/clock/qcom,x1e80100-gcc.h | 2 ++ 6 files changed, 50 insertions(+), 2 deletions(-) --- base-commit: 0672fe83ed07387afb88653ab3b5dae4c84cf3ce change-id: 20250701-x1e-videocc-10f1f2257463 Best regards, -- Stephan Gerhold