From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B6E82EBBB3; Fri, 11 Jul 2025 14:52:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752245569; cv=none; b=oaqF9HfUkZJTpsprZthm2gIsdtTtW1MrIefVKlzcXPaNqmktiEoq/hss1vjwwKWa0hMce/GyPjLW0ozvhDg1mJX0gvY1azSIDVuoO2bA+0q9gbzclHKSDb6N0ujj9Nsr+xhorEnt1GjI3KK6Kf2kEif7ElkEHJIcPG8x2IzO05c= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752245569; c=relaxed/simple; bh=gftIvYHzveImR+MPjt/uzTmWFEBJ3zj0CJjUcncYRD4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=nj7n7oe37JtMumqSNAgUbVNVrTsKgkCkez9RtLgyjDj98Q/csqfKq2dCIq2o5I/yXe077RVDbvtMlrvyfBpYCT2UR+9ZzhGq9N5SaesyDITWVbKYYRDqTm0aJE2Xq9mUsBYhZoCHZvHNF6Ms49dHgmei/KgoksrziGLSVf/5bJ0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=6K3QshSG; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="6K3QshSG" Received: from pps.filterd (m0369458.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56BEmR9s016134; Fri, 11 Jul 2025 16:52:33 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= +oFosf+Y2aWw9hUSMPebh2RDsEkKVFT8bx1JKOIHJNs=; b=6K3QshSG82MHxDKD Cv04rWlAUcy5JsZsHrt0SfF0JPUFq4Qio8SCDOlJ65xczWzDd3bgHbB5wR2OFW51 0hlWLHF2NTC1C5sfxGDb7oTRB4xobDFeEdNpIj6jSsYV4vdKUj7wr163yL/S3+Va XbTKpPa3/xPKbOc8qsieXNJSPh+tiN2z57uqPHjF3op6QKtgoKSeuX6o26wn4lT/ aARy6xGiDSfX4D3Xq1lPxsnkDWWwkDElpa8dEdWkx1n0A1zystiX/A1nam/KOhU7 s+VbzcIZoylG6Qh2Ogyr+mkQzORi/ojguFZArXvxOTQ7pZ08RFHFUBWSRJJnHh0u KjObQQ== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 47qdm6csfs-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 11 Jul 2025 16:52:33 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D027B40052; Fri, 11 Jul 2025 16:51:19 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 49807B56887; Fri, 11 Jul 2025 16:49:23 +0200 (CEST) Received: from localhost (10.252.16.187) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 11 Jul 2025 16:49:22 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Fri, 11 Jul 2025 16:49:04 +0200 Subject: [PATCH v2 12/16] ARM: dts: stm32: add ddrperfm on stm32mp131 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20250711-ddrperfm-upstream-v2-12-cdece720348f@foss.st.com> References: <20250711-ddrperfm-upstream-v2-0-cdece720348f@foss.st.com> In-Reply-To: <20250711-ddrperfm-upstream-v2-0-cdece720348f@foss.st.com> To: Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Jonathan Corbet , Gatien Chevallier , Michael Turquette , Stephen Boyd , Gabriel Fernandez , Krzysztof Kozlowski , Le Goffic CC: , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-7616d X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-11_03,2025-07-09_01,2025-03-28_01 The DDRPERFM is the DDR Performance Monitor embedded in STM32MP131 SoC. Signed-off-by: Clément Le Goffic --- arch/arm/boot/dts/st/stm32mp131.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index 492bcf586361..e097723789aa 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -998,6 +998,13 @@ iwdg2: watchdog@5a002000 { status = "disabled"; }; + ddrperfm: perf@5a007000 { + compatible = "st,stm32mp131-ddr-pmu"; + reg = <0x5a007000 0x400>; + clocks = <&rcc DDRPERFM>; + resets = <&rcc DDRPERFM_R>; + }; + rtc: rtc@5c004000 { compatible = "st,stm32mp1-rtc"; reg = <0x5c004000 0x400>; -- 2.43.0