[PATCH 1/2] arm64/dts/blaize: Enable Ethernet support for BLZP1600

[PATCH 1/2] arm64/dts/blaize: Enable Ethernet support for BLZP1600

[Nikolaos Pasaloukos]

Enable the Synopsys gigabit Ethernet controller which is available
on the Blaize BLZP1600 SoC.

Due to the SoC IP block configuration, the max frame size cannot
exceed the 2030 bytes.

Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
---
 arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi b/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
index 5a6c882b2f57d57d304869dee877c996cbabb712..890f678ddbc43f84cb3cc16c9d2af6edb6350ecc 100644
--- a/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
+++ b/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
@@ -213,5 +213,27 @@ arm_cc712: crypto@550000 {
 			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&scmi_clk 7>;
 		};
+
+		gmac: ethernet@640000 {
+			compatible = "snps,dwmac";
+			reg = <0x640000 0x8000>;
+			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			clocks = <&scmi_clk 29>, <&scmi_clk 71>;
+			clock-names = "stmmaceth", "pclk";
+			resets = <&scmi_rst 29>;
+			reset-names = "stmmaceth";
+			rx-fifo-depth = <4096>;
+			tx-fifo-depth = <4096>;
+			max-frame-size = <2030>;  /* Due to SoC IP configuration */
+			snps,axi-config = <&stmmac_axi_setup>;
+			status = "disabled";
+
+			stmmac_axi_setup: stmmac-axi-config {
+				snps,wr_osr_lmt = <0xf>;
+				snps,rd_osr_lmt = <0xf>;
+				snps,blen = <0 0 0 0 16 8 4>;
+			};
+		};
 	};
 };

-- 
2.43.0

[PATCH 0/2] arm64/blaize: Enable Ethernet to SoC & CB2

[Nikolaos Pasaloukos]

BLZP1600 SoC includes a Synopsys gigabit Ethernet controller which
is supported by the upstream "snps,dwmac" driver.
Add a device tree entry to enable the network controller with
its associated interrupts, clocks, resets and configurations.

The Blaize CB2 board contains a TI DP83867 Phy connecting the
Ethernet controller to an RJ45 connector on the board. Add a
device tree entry for this with its associated reset via a
GPIO signal to enable Ethernet connectivity on the board.

Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
---
Nikolaos Pasaloukos (2):
      arm64/dts/blaize: Enable Ethernet support for BLZP1600
      arm64/dts/blaize: Enable Ethernet on CB2 board

 arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts | 22 ++++++++++++++++++++++
 arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi    | 22 ++++++++++++++++++++++
 2 files changed, 44 insertions(+)
---
base-commit: d96b887ccb6676f366968ab6c7dcd328e264d33c
change-id: 20250530-kernel-upstreaming-add_network_support-979124800265

Best regards,
-- 
Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>

[PATCH 2/2] arm64/dts/blaize: Enable Ethernet on CB2 board

[Nikolaos Pasaloukos]

Use the Synopsys gigabit Ethernet controller on the Blaize BLZP1600
SoC to provide Ethernet connectivity using the TI DP83867 PHY which is
available on the CB2 board via an RJ45 connector.

Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
---
 arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts b/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
index fb5415eb347a028fc65090027a4c4fc89c8280f5..cbe8f0930ad3741b0e770dd7d494931e3b939815 100644
--- a/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
+++ b/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include "blaize-blzp1600-som.dtsi"
+#include <dt-bindings/net/ti-dp83867.h>
 
 / {
 	model = "Blaize BLZP1600 SoM1600P CB2 Development Board";
@@ -14,6 +15,7 @@ / {
 
 	aliases {
 		serial0 = &uart0;
+		ethernet = &gmac;
 	};
 
 	chosen {
@@ -117,3 +119,23 @@ &gpio0 {
 			  "BOARD_ID_1",		/* GPIO_30 */
 			  "BOARD_ID_2";		/* GPIO_31 */
 };
+
+&gmac {
+	status = "okay";
+	snps,reset-delays-us = <0 10000 50000>;
+	snps,reset-gpio = <&gpio0 12 GPIO_ACTIVE_LOW>;
+	phy-handle = <&phy0>;
+	phy-mode = "rgmii-id";
+	mdio {
+		compatible = "snps,dwmac-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		phy0: ethernet-phy@0 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0>;
+			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_6_B_NIB>;
+		};
+	};
+};

-- 
2.43.0

Re: [PATCH 1/2] arm64/dts/blaize: Enable Ethernet support for BLZP1600

[Krzysztof Kozlowski]

On 11/07/2025 15:36, Nikolaos Pasaloukos wrote:
> Enable the Synopsys gigabit Ethernet controller which is available
> on the Blaize BLZP1600 SoC.
> 
> Due to the SoC IP block configuration, the max frame size cannot
> exceed the 2030 bytes.
> 
> Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
> ---
>  arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi | 22 ++++++++++++++++++++++

Subject prefix: that's not standard. arm64: dts: blaize:


See git log.

>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi b/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
> index 5a6c882b2f57d57d304869dee877c996cbabb712..890f678ddbc43f84cb3cc16c9d2af6edb6350ecc 100644
> --- a/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
> +++ b/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
> @@ -213,5 +213,27 @@ arm_cc712: crypto@550000 {
>  			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&scmi_clk 7>;
>  		};
> +
> +		gmac: ethernet@640000 {
> +			compatible = "snps,dwmac";

You need specific compatibles for your soc most likely.

This should be really disallowed alone, but every vendor keeps copying
and doing the same :/


Best regards,
Krzysztof

Re: [PATCH 2/2] arm64/dts/blaize: Enable Ethernet on CB2 board

[Krzysztof Kozlowski]

On 11/07/2025 15:36, Nikolaos Pasaloukos wrote:
> Use the Synopsys gigabit Ethernet controller on the Blaize BLZP1600
> SoC to provide Ethernet connectivity using the TI DP83867 PHY which is
> available on the CB2 board via an RJ45 connector.
> 
> Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
> ---
>  arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts b/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
> index fb5415eb347a028fc65090027a4c4fc89c8280f5..cbe8f0930ad3741b0e770dd7d494931e3b939815 100644
> --- a/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
> +++ b/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
> @@ -6,6 +6,7 @@
>  /dts-v1/;
>  
>  #include "blaize-blzp1600-som.dtsi"
> +#include <dt-bindings/net/ti-dp83867.h>
>  
>  / {
>  	model = "Blaize BLZP1600 SoM1600P CB2 Development Board";
> @@ -14,6 +15,7 @@ / {
>  
>  	aliases {
>  		serial0 = &uart0;
> +		ethernet = &gmac;
>  	};
>  
>  	chosen {
> @@ -117,3 +119,23 @@ &gpio0 {
>  			  "BOARD_ID_1",		/* GPIO_30 */
>  			  "BOARD_ID_2";		/* GPIO_31 */
>  };
> +
> +&gmac {

Are you sure you follow DTS coding style? Which sorting rule is used by
Blaize?

> +	status = "okay";
> +	snps,reset-delays-us = <0 10000 50000>;
> +	snps,reset-gpio = <&gpio0 12 GPIO_ACTIVE_LOW>;

Do not use deprecated properties. This is new code, not legacy.


Best regards,
Krzysztof

Re: [PATCH 2/2] arm64/dts/blaize: Enable Ethernet on CB2 board

[Nikolaos Pasaloukos]

On 11/07/2025 14:51, Krzysztof Kozlowski wrote:
> On 11/07/2025 15:36, Nikolaos Pasaloukos wrote:
>> Use the Synopsys gigabit Ethernet controller on the Blaize BLZP1600
>> SoC to provide Ethernet connectivity using the TI DP83867 PHY which is
>> available on the CB2 board via an RJ45 connector.
>>
>> Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
>> ---
>>   arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts | 22 ++++++++++++++++++++++
>>   1 file changed, 22 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts b/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
>> index fb5415eb347a028fc65090027a4c4fc89c8280f5..cbe8f0930ad3741b0e770dd7d494931e3b939815 100644
>> --- a/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
>> +++ b/arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts
>> @@ -6,6 +6,7 @@
>>   /dts-v1/;
>>   
>>   #include "blaize-blzp1600-som.dtsi"
>> +#include <dt-bindings/net/ti-dp83867.h>
>>   
>>   / {
>>   	model = "Blaize BLZP1600 SoM1600P CB2 Development Board";
>> @@ -14,6 +15,7 @@ / {
>>   
>>   	aliases {
>>   		serial0 = &uart0;
>> +		ethernet = &gmac;
>>   	};
>>   
>>   	chosen {
>> @@ -117,3 +119,23 @@ &gpio0 {
>>   			  "BOARD_ID_1",		/* GPIO_30 */
>>   			  "BOARD_ID_2";		/* GPIO_31 */
>>   };
>> +
>> +&gmac {
> Are you sure you follow DTS coding style? Which sorting rule is used by
> Blaize?

Hi Krzysztof,

First of all, thank you for your fast review. Apologies that I missed
that I missed that one, it was meant to be alphabetical, so above the
gpio0 section. Thanks for catching that.

>
>> +	status = "okay";
>> +	snps,reset-delays-us = <0 10000 50000>;
>> +	snps,reset-gpio = <&gpio0 12 GPIO_ACTIVE_LOW>;
> Do not use deprecated properties. This is new code, not legacy.
>
>
> Best regards,
> Krzysztof

Thanks, I'll remove those.

Best regards,
Niko