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* [PATCH v5 0/2] Add support for AMD Versal Gen 2 MDB PCIe RP PERST#
@ 2025-07-11  5:23 Sai Krishna Musham
  2025-07-11  5:23 ` [PATCH v5 1/2] dt-bindings: PCI: amd-mdb: Add example usage of reset-gpios for " Sai Krishna Musham
  2025-07-11  5:23 ` [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST# signal handling Sai Krishna Musham
  0 siblings, 2 replies; 7+ messages in thread
From: Sai Krishna Musham @ 2025-07-11  5:23 UTC (permalink / raw)
  To: bhelgaas, lpieralisi, kw, mani, robh, krzk+dt, conor+dt, cassel
  Cc: linux-pci, devicetree, linux-kernel, michal.simek,
	bharat.kumar.gogada, thippeswamy.havalige, sai.krishna.musham

Add example usage of reset-gpios for PCIe RP PERST#

Add support for PCIe Root Port PERST# signal handling

Sai Krishna Musham (2):
  dt-bindings: PCI: amd-mdb: Add example usage of reset-gpios for PCIe
    RP PERST#
  PCI: amd-mdb: Add support for PCIe RP PERST# signal handling

 .../bindings/pci/amd,versal2-mdb-host.yaml    | 22 +++++++
 drivers/pci/controller/dwc/pcie-amd-mdb.c     | 63 ++++++++++++++++++-
 2 files changed, 84 insertions(+), 1 deletion(-)


base-commit: 19272b37aa4f83ca52bdf9c16d5d81bdd1354494
-- 
2.44.1


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH v5 1/2] dt-bindings: PCI: amd-mdb: Add example usage of reset-gpios for PCIe RP PERST#
  2025-07-11  5:23 [PATCH v5 0/2] Add support for AMD Versal Gen 2 MDB PCIe RP PERST# Sai Krishna Musham
@ 2025-07-11  5:23 ` Sai Krishna Musham
  2025-07-11  5:23 ` [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST# signal handling Sai Krishna Musham
  1 sibling, 0 replies; 7+ messages in thread
From: Sai Krishna Musham @ 2025-07-11  5:23 UTC (permalink / raw)
  To: bhelgaas, lpieralisi, kw, mani, robh, krzk+dt, conor+dt, cassel
  Cc: linux-pci, devicetree, linux-kernel, michal.simek,
	bharat.kumar.gogada, thippeswamy.havalige, sai.krishna.musham

Update the device tree binding example to include usage of the
`reset-gpios` property in PCIe Root Port (RP) bridge node for PERST#
signal handling.

Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
---
Changes in v5:
- Add Reviewed-by tag.

Changes in v4:
- Remove reset-gpios define as it is already part of pci-bus-common.yaml.

Changes in v3:
- Move reset-gpios to PCI bridge node.

Changes in v2:
- Update commit message

v4 https://lore.kernel.org/all/20250626054906.3277029-1-sai.krishna.musham@amd.com/
v3 https://lore.kernel.org/r/20250618080931.2472366-1-sai.krishna.musham@amd.com/
v2 https://lore.kernel.org/r/20250429090046.1512000-1-sai.krishna.musham@amd.com/
v1 https://lore.kernel.org/r/20250326041507.98232-1-sai.krishna.musham@amd.com/
---
 .../bindings/pci/amd,versal2-mdb-host.yaml    | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
index 43dc2585c237..421e1116ae7e 100644
--- a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
+++ b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
@@ -71,6 +71,17 @@ properties:
       - "#address-cells"
       - "#interrupt-cells"
 
+patternProperties:
+  '^pcie@[0-2],0$':
+    type: object
+    $ref: /schemas/pci/pci-pci-bridge.yaml#
+
+    properties:
+      reg:
+        maxItems: 1
+
+    unevaluatedProperties: false
+
 required:
   - reg
   - reg-names
@@ -87,6 +98,7 @@ examples:
   - |
     #include <dt-bindings/interrupt-controller/arm-gic.h>
     #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/gpio/gpio.h>
 
     soc {
         #address-cells = <2>;
@@ -112,6 +124,16 @@ examples:
             #size-cells = <2>;
             #interrupt-cells = <1>;
             device_type = "pci";
+
+            pcie@0,0 {
+                device_type = "pci";
+                reg = <0x0 0x0 0x0 0x0 0x0>;
+                reset-gpios = <&tca6416_u37 7 GPIO_ACTIVE_LOW>;
+                #address-cells = <3>;
+                #size-cells = <2>;
+                ranges;
+            };
+
             pcie_intc_0: interrupt-controller {
                 #address-cells = <0>;
                 #interrupt-cells = <1>;
-- 
2.44.1


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST# signal handling
  2025-07-11  5:23 [PATCH v5 0/2] Add support for AMD Versal Gen 2 MDB PCIe RP PERST# Sai Krishna Musham
  2025-07-11  5:23 ` [PATCH v5 1/2] dt-bindings: PCI: amd-mdb: Add example usage of reset-gpios for " Sai Krishna Musham
@ 2025-07-11  5:23 ` Sai Krishna Musham
  2025-07-11 23:18   ` Bjorn Helgaas
  1 sibling, 1 reply; 7+ messages in thread
From: Sai Krishna Musham @ 2025-07-11  5:23 UTC (permalink / raw)
  To: bhelgaas, lpieralisi, kw, mani, robh, krzk+dt, conor+dt, cassel
  Cc: linux-pci, devicetree, linux-kernel, michal.simek,
	bharat.kumar.gogada, thippeswamy.havalige, sai.krishna.musham

Add support for handling the AMD Versal Gen 2 MDB PCIe Root Port PERST#
signal via a GPIO by parsing the new PCIe bridge node to acquire the
reset GPIO. If the bridge node is not found, fall back to acquiring it
from the PCIe node.

As part of this, update the interrupt controller node parsing to use
of_get_child_by_name() instead of of_get_next_child(), since the PCIe
node now has multiple children. This ensures the correct node is
selected during initialization.

Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
---
Changes in v5:
- Add fall back mechanism to acquire reset GPIO from PCIe node when PCIe Bridge
node is not present.

Changes in v4:
- Resolve kernel test robot warning.
https://lore.kernel.org/oe-kbuild-all/202506241020.rPD1a2Vr-lkp@intel.com/
- Update commit message.

Changes in v3:
- Implement amd_mdb_parse_pcie_port to parse bridge node for reset-gpios property.

Changes in v2:
- Change delay to PCIE_T_PVPERL_MS

v4 https://lore.kernel.org/all/20250626054906.3277029-1-sai.krishna.musham@amd.com/
v3 https://lore.kernel.org/r/20250618080931.2472366-1-sai.krishna.musham@amd.com/
v2 https://lore.kernel.org/r/20250429090046.1512000-1-sai.krishna.musham@amd.com/
v1 https://lore.kernel.org/r/20250326041507.98232-1-sai.krishna.musham@amd.com/
---
 drivers/pci/controller/dwc/pcie-amd-mdb.c | 63 ++++++++++++++++++++++-
 1 file changed, 62 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-amd-mdb.c b/drivers/pci/controller/dwc/pcie-amd-mdb.c
index 9f7251a16d32..d633463dc9fe 100644
--- a/drivers/pci/controller/dwc/pcie-amd-mdb.c
+++ b/drivers/pci/controller/dwc/pcie-amd-mdb.c
@@ -18,6 +18,7 @@
 #include <linux/resource.h>
 #include <linux/types.h>
 
+#include "../../pci.h"
 #include "pcie-designware.h"
 
 #define AMD_MDB_TLP_IR_STATUS_MISC		0x4C0
@@ -56,6 +57,7 @@
  * @slcr: MDB System Level Control and Status Register (SLCR) base
  * @intx_domain: INTx IRQ domain pointer
  * @mdb_domain: MDB IRQ domain pointer
+ * @perst_gpio: GPIO descriptor for PERST# signal handling
  * @intx_irq: INTx IRQ interrupt number
  */
 struct amd_mdb_pcie {
@@ -63,6 +65,7 @@ struct amd_mdb_pcie {
 	void __iomem			*slcr;
 	struct irq_domain		*intx_domain;
 	struct irq_domain		*mdb_domain;
+	struct gpio_desc		*perst_gpio;
 	int				intx_irq;
 };
 
@@ -284,7 +287,7 @@ static int amd_mdb_pcie_init_irq_domains(struct amd_mdb_pcie *pcie,
 	struct device_node *pcie_intc_node;
 	int err;
 
-	pcie_intc_node = of_get_next_child(node, NULL);
+	pcie_intc_node = of_get_child_by_name(node, "interrupt-controller");
 	if (!pcie_intc_node) {
 		dev_err(dev, "No PCIe Intc node found\n");
 		return -ENODEV;
@@ -402,6 +405,34 @@ static int amd_mdb_setup_irq(struct amd_mdb_pcie *pcie,
 	return 0;
 }
 
+static int amd_mdb_parse_pcie_port(struct amd_mdb_pcie *pcie)
+{
+	struct device *dev = pcie->pci.dev;
+	struct device_node *pcie_port_node;
+
+	pcie_port_node = of_get_next_child_with_prefix(dev->of_node, NULL, "pcie");
+	if (!pcie_port_node) {
+		dev_err(dev, "No PCIe Bridge node found\n");
+		return -ENODEV;
+	}
+
+	/* Request the GPIO for PCIe reset signal and assert */
+	pcie->perst_gpio = devm_fwnode_gpiod_get(dev, of_fwnode_handle(pcie_port_node),
+						 "reset", GPIOD_OUT_HIGH, NULL);
+	if (IS_ERR(pcie->perst_gpio)) {
+		if (PTR_ERR(pcie->perst_gpio) != -ENOENT) {
+			of_node_put(pcie_port_node);
+			return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
+					     "Failed to request reset GPIO\n");
+		}
+		pcie->perst_gpio = NULL;
+	}
+
+	of_node_put(pcie_port_node);
+
+	return 0;
+}
+
 static int amd_mdb_add_pcie_port(struct amd_mdb_pcie *pcie,
 				 struct platform_device *pdev)
 {
@@ -426,6 +457,14 @@ static int amd_mdb_add_pcie_port(struct amd_mdb_pcie *pcie,
 
 	pp->ops = &amd_mdb_pcie_host_ops;
 
+	if (pcie->perst_gpio) {
+		mdelay(PCIE_T_PVPERL_MS);
+
+		/* Deassert the reset signal */
+		gpiod_set_value_cansleep(pcie->perst_gpio, 0);
+		mdelay(PCIE_T_RRS_READY_MS);
+	}
+
 	err = dw_pcie_host_init(pp);
 	if (err) {
 		dev_err(dev, "Failed to initialize host, err=%d\n", err);
@@ -444,6 +483,7 @@ static int amd_mdb_pcie_probe(struct platform_device *pdev)
 	struct device *dev = &pdev->dev;
 	struct amd_mdb_pcie *pcie;
 	struct dw_pcie *pci;
+	int ret;
 
 	pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
 	if (!pcie)
@@ -454,6 +494,27 @@ static int amd_mdb_pcie_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, pcie);
 
+	ret = amd_mdb_parse_pcie_port(pcie);
+
+	/*
+	 * If amd_mdb_parse_pcie_port returns -ENODEV, it indicates that the
+	 * PCIe Bridge node was not found in the device tree. This is not
+	 * considered a fatal error and will trigger a fallback where the
+	 * reset GPIO is acquired directly from the PCIe node.
+	 */
+	if (ret && ret != -ENODEV) {
+		return ret;
+	} else if (ret == -ENODEV) {
+		dev_info(dev, "Falling back to acquire reset GPIO from PCIe node\n");
+
+		/* Request the GPIO for PCIe reset signal and assert */
+		pcie->perst_gpio = devm_gpiod_get_optional(dev, "reset",
+							   GPIOD_OUT_HIGH);
+		if (IS_ERR(pcie->perst_gpio))
+			return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
+					     "Failed to request reset GPIO\n");
+	}
+
 	return amd_mdb_add_pcie_port(pcie, pdev);
 }
 
-- 
2.44.1


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST# signal handling
  2025-07-11  5:23 ` [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST# signal handling Sai Krishna Musham
@ 2025-07-11 23:18   ` Bjorn Helgaas
  2025-07-18  4:30     ` Musham, Sai Krishna
  0 siblings, 1 reply; 7+ messages in thread
From: Bjorn Helgaas @ 2025-07-11 23:18 UTC (permalink / raw)
  To: Sai Krishna Musham
  Cc: bhelgaas, lpieralisi, kw, mani, robh, krzk+dt, conor+dt, cassel,
	linux-pci, devicetree, linux-kernel, michal.simek,
	bharat.kumar.gogada, thippeswamy.havalige

On Fri, Jul 11, 2025 at 10:53:57AM +0530, Sai Krishna Musham wrote:
> Add support for handling the AMD Versal Gen 2 MDB PCIe Root Port PERST#
> signal via a GPIO by parsing the new PCIe bridge node to acquire the
> reset GPIO. If the bridge node is not found, fall back to acquiring it
> from the PCIe node.
> 
> As part of this, update the interrupt controller node parsing to use
> of_get_child_by_name() instead of of_get_next_child(), since the PCIe
> node now has multiple children. This ensures the correct node is
> selected during initialization.
> 
> Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
> ---
> Changes in v5:
> - Add fall back mechanism to acquire reset GPIO from PCIe node when PCIe Bridge
> node is not present.
> 
> Changes in v4:
> - Resolve kernel test robot warning.
> https://lore.kernel.org/oe-kbuild-all/202506241020.rPD1a2Vr-lkp@intel.com/
> - Update commit message.
> 
> Changes in v3:
> - Implement amd_mdb_parse_pcie_port to parse bridge node for reset-gpios property.
> 
> Changes in v2:
> - Change delay to PCIE_T_PVPERL_MS
> 
> v4 https://lore.kernel.org/all/20250626054906.3277029-1-sai.krishna.musham@amd.com/
> v3 https://lore.kernel.org/r/20250618080931.2472366-1-sai.krishna.musham@amd.com/
> v2 https://lore.kernel.org/r/20250429090046.1512000-1-sai.krishna.musham@amd.com/
> v1 https://lore.kernel.org/r/20250326041507.98232-1-sai.krishna.musham@amd.com/
> ---
>  drivers/pci/controller/dwc/pcie-amd-mdb.c | 63 ++++++++++++++++++++++-
>  1 file changed, 62 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-amd-mdb.c b/drivers/pci/controller/dwc/pcie-amd-mdb.c
> index 9f7251a16d32..d633463dc9fe 100644
> --- a/drivers/pci/controller/dwc/pcie-amd-mdb.c
> +++ b/drivers/pci/controller/dwc/pcie-amd-mdb.c
> @@ -18,6 +18,7 @@
>  #include <linux/resource.h>
>  #include <linux/types.h>
>  
> +#include "../../pci.h"
>  #include "pcie-designware.h"
>  
>  #define AMD_MDB_TLP_IR_STATUS_MISC		0x4C0
> @@ -56,6 +57,7 @@
>   * @slcr: MDB System Level Control and Status Register (SLCR) base
>   * @intx_domain: INTx IRQ domain pointer
>   * @mdb_domain: MDB IRQ domain pointer
> + * @perst_gpio: GPIO descriptor for PERST# signal handling
>   * @intx_irq: INTx IRQ interrupt number
>   */
>  struct amd_mdb_pcie {
> @@ -63,6 +65,7 @@ struct amd_mdb_pcie {
>  	void __iomem			*slcr;
>  	struct irq_domain		*intx_domain;
>  	struct irq_domain		*mdb_domain;
> +	struct gpio_desc		*perst_gpio;
>  	int				intx_irq;
>  };
>  
> @@ -284,7 +287,7 @@ static int amd_mdb_pcie_init_irq_domains(struct amd_mdb_pcie *pcie,
>  	struct device_node *pcie_intc_node;
>  	int err;
>  
> -	pcie_intc_node = of_get_next_child(node, NULL);
> +	pcie_intc_node = of_get_child_by_name(node, "interrupt-controller");
>  	if (!pcie_intc_node) {
>  		dev_err(dev, "No PCIe Intc node found\n");
>  		return -ENODEV;
> @@ -402,6 +405,34 @@ static int amd_mdb_setup_irq(struct amd_mdb_pcie *pcie,
>  	return 0;
>  }
>  
> +static int amd_mdb_parse_pcie_port(struct amd_mdb_pcie *pcie)
> +{
> +	struct device *dev = pcie->pci.dev;
> +	struct device_node *pcie_port_node;
> +
> +	pcie_port_node = of_get_next_child_with_prefix(dev->of_node, NULL, "pcie");
> +	if (!pcie_port_node) {
> +		dev_err(dev, "No PCIe Bridge node found\n");
> +		return -ENODEV;
> +	}
> +
> +	/* Request the GPIO for PCIe reset signal and assert */
> +	pcie->perst_gpio = devm_fwnode_gpiod_get(dev, of_fwnode_handle(pcie_port_node),
> +						 "reset", GPIOD_OUT_HIGH, NULL);
> +	if (IS_ERR(pcie->perst_gpio)) {
> +		if (PTR_ERR(pcie->perst_gpio) != -ENOENT) {
> +			of_node_put(pcie_port_node);
> +			return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
> +					     "Failed to request reset GPIO\n");
> +		}
> +		pcie->perst_gpio = NULL;
> +	}
> +
> +	of_node_put(pcie_port_node);
> +
> +	return 0;
> +}
> +
>  static int amd_mdb_add_pcie_port(struct amd_mdb_pcie *pcie,
>  				 struct platform_device *pdev)
>  {
> @@ -426,6 +457,14 @@ static int amd_mdb_add_pcie_port(struct amd_mdb_pcie *pcie,
>  
>  	pp->ops = &amd_mdb_pcie_host_ops;
>  
> +	if (pcie->perst_gpio) {
> +		mdelay(PCIE_T_PVPERL_MS);
> +
> +		/* Deassert the reset signal */
> +		gpiod_set_value_cansleep(pcie->perst_gpio, 0);
> +		mdelay(PCIE_T_RRS_READY_MS);
> +	}
> +
>  	err = dw_pcie_host_init(pp);
>  	if (err) {
>  		dev_err(dev, "Failed to initialize host, err=%d\n", err);
> @@ -444,6 +483,7 @@ static int amd_mdb_pcie_probe(struct platform_device *pdev)
>  	struct device *dev = &pdev->dev;
>  	struct amd_mdb_pcie *pcie;
>  	struct dw_pcie *pci;
> +	int ret;
>  
>  	pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
>  	if (!pcie)
> @@ -454,6 +494,27 @@ static int amd_mdb_pcie_probe(struct platform_device *pdev)
>  
>  	platform_set_drvdata(pdev, pcie);
>  
> +	ret = amd_mdb_parse_pcie_port(pcie);
> +
> +	/*
> +	 * If amd_mdb_parse_pcie_port returns -ENODEV, it indicates that the
> +	 * PCIe Bridge node was not found in the device tree. This is not
> +	 * considered a fatal error and will trigger a fallback where the
> +	 * reset GPIO is acquired directly from the PCIe node.
> +	 */
> +	if (ret && ret != -ENODEV) {
> +		return ret;
> +	} else if (ret == -ENODEV) {

The "ret" checking seems unnecessarily complicated.

> +		dev_info(dev, "Falling back to acquire reset GPIO from PCIe node\n");

I don't think this is worthy of a message.  If there are DTs in the
field that were valid once, they continue to be valid forever, and
there's no point in complaining about them.

https://lore.kernel.org/all/20250702-perst-v5-2-920b3d1f6ee1@qti.qualcomm.com/
has a good example of how to this fallback nicely.

Otherwise looks good to me.

> +
> +		/* Request the GPIO for PCIe reset signal and assert */
> +		pcie->perst_gpio = devm_gpiod_get_optional(dev, "reset",
> +							   GPIOD_OUT_HIGH);
> +		if (IS_ERR(pcie->perst_gpio))
> +			return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
> +					     "Failed to request reset GPIO\n");
> +	}
> +
>  	return amd_mdb_add_pcie_port(pcie, pdev);
>  }
>  
> -- 
> 2.44.1
> 

^ permalink raw reply	[flat|nested] 7+ messages in thread

* RE: [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST# signal handling
  2025-07-11 23:18   ` Bjorn Helgaas
@ 2025-07-18  4:30     ` Musham, Sai Krishna
  2025-07-18 16:31       ` Bjorn Helgaas
  0 siblings, 1 reply; 7+ messages in thread
From: Musham, Sai Krishna @ 2025-07-18  4:30 UTC (permalink / raw)
  To: Bjorn Helgaas
  Cc: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
	mani@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, cassel@kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Simek, Michal, Gogada, Bharat Kumar, Havalige, Thippeswamy

[AMD Official Use Only - AMD Internal Distribution Only]

Hi Bjorn,

> -----Original Message-----
> From: Bjorn Helgaas <helgaas@kernel.org>
> Sent: Saturday, July 12, 2025 4:49 AM
> To: Musham, Sai Krishna <sai.krishna.musham@amd.com>
> Cc: bhelgaas@google.com; lpieralisi@kernel.org; kw@linux.com; mani@kernel.org;
> robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; cassel@kernel.org;
> linux-pci@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; Simek, Michal <michal.simek@amd.com>; Gogada, Bharat
> Kumar <bharat.kumar.gogada@amd.com>; Havalige, Thippeswamy
> <thippeswamy.havalige@amd.com>
> Subject: Re: [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST#
> signal handling
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On Fri, Jul 11, 2025 at 10:53:57AM +0530, Sai Krishna Musham wrote:
> > Add support for handling the AMD Versal Gen 2 MDB PCIe Root Port PERST#
> > signal via a GPIO by parsing the new PCIe bridge node to acquire the
> > reset GPIO. If the bridge node is not found, fall back to acquiring it
> > from the PCIe node.
> >
> > As part of this, update the interrupt controller node parsing to use
> > of_get_child_by_name() instead of of_get_next_child(), since the PCIe
> > node now has multiple children. This ensures the correct node is
> > selected during initialization.
> >
> > Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
> > ---
> > Changes in v5:
> > - Add fall back mechanism to acquire reset GPIO from PCIe node when PCIe
> Bridge
> > node is not present.
> >
> > Changes in v4:
> > - Resolve kernel test robot warning.
> > https://lore.kernel.org/oe-kbuild-all/202506241020.rPD1a2Vr-lkp@intel.com/
> > - Update commit message.
> >
> > Changes in v3:
> > - Implement amd_mdb_parse_pcie_port to parse bridge node for reset-gpios
> property.
> >
> > Changes in v2:
> > - Change delay to PCIE_T_PVPERL_MS
> >
> > v4 https://lore.kernel.org/all/20250626054906.3277029-1-
> sai.krishna.musham@amd.com/
> > v3 https://lore.kernel.org/r/20250618080931.2472366-1-
> sai.krishna.musham@amd.com/
> > v2 https://lore.kernel.org/r/20250429090046.1512000-1-
> sai.krishna.musham@amd.com/
> > v1 https://lore.kernel.org/r/20250326041507.98232-1-
> sai.krishna.musham@amd.com/
> > ---
> >  drivers/pci/controller/dwc/pcie-amd-mdb.c | 63 ++++++++++++++++++++++-
> >  1 file changed, 62 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-amd-mdb.c
> b/drivers/pci/controller/dwc/pcie-amd-mdb.c
> > index 9f7251a16d32..d633463dc9fe 100644
> > --- a/drivers/pci/controller/dwc/pcie-amd-mdb.c
> > +++ b/drivers/pci/controller/dwc/pcie-amd-mdb.c
> > @@ -18,6 +18,7 @@
> >  #include <linux/resource.h>
> >  #include <linux/types.h>
> >
> > +#include "../../pci.h"
> >  #include "pcie-designware.h"
> >
> >  #define AMD_MDB_TLP_IR_STATUS_MISC           0x4C0
> > @@ -56,6 +57,7 @@
> >   * @slcr: MDB System Level Control and Status Register (SLCR) base
> >   * @intx_domain: INTx IRQ domain pointer
> >   * @mdb_domain: MDB IRQ domain pointer
> > + * @perst_gpio: GPIO descriptor for PERST# signal handling
> >   * @intx_irq: INTx IRQ interrupt number
> >   */
> >  struct amd_mdb_pcie {
> > @@ -63,6 +65,7 @@ struct amd_mdb_pcie {
> >       void __iomem                    *slcr;
> >       struct irq_domain               *intx_domain;
> >       struct irq_domain               *mdb_domain;
> > +     struct gpio_desc                *perst_gpio;
> >       int                             intx_irq;
> >  };
> >
> > @@ -284,7 +287,7 @@ static int amd_mdb_pcie_init_irq_domains(struct
> amd_mdb_pcie *pcie,
> >       struct device_node *pcie_intc_node;
> >       int err;
> >
> > -     pcie_intc_node = of_get_next_child(node, NULL);
> > +     pcie_intc_node = of_get_child_by_name(node, "interrupt-controller");
> >       if (!pcie_intc_node) {
> >               dev_err(dev, "No PCIe Intc node found\n");
> >               return -ENODEV;
> > @@ -402,6 +405,34 @@ static int amd_mdb_setup_irq(struct amd_mdb_pcie
> *pcie,
> >       return 0;
> >  }
> >
> > +static int amd_mdb_parse_pcie_port(struct amd_mdb_pcie *pcie)
> > +{
> > +     struct device *dev = pcie->pci.dev;
> > +     struct device_node *pcie_port_node;
> > +
> > +     pcie_port_node = of_get_next_child_with_prefix(dev->of_node, NULL, "pcie");
> > +     if (!pcie_port_node) {
> > +             dev_err(dev, "No PCIe Bridge node found\n");
> > +             return -ENODEV;
> > +     }
> > +
> > +     /* Request the GPIO for PCIe reset signal and assert */
> > +     pcie->perst_gpio = devm_fwnode_gpiod_get(dev,
> of_fwnode_handle(pcie_port_node),
> > +                                              "reset", GPIOD_OUT_HIGH, NULL);
> > +     if (IS_ERR(pcie->perst_gpio)) {
> > +             if (PTR_ERR(pcie->perst_gpio) != -ENOENT) {
> > +                     of_node_put(pcie_port_node);
> > +                     return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
> > +                                          "Failed to request reset GPIO\n");
> > +             }
> > +             pcie->perst_gpio = NULL;
> > +     }
> > +
> > +     of_node_put(pcie_port_node);
> > +
> > +     return 0;
> > +}
> > +
> >  static int amd_mdb_add_pcie_port(struct amd_mdb_pcie *pcie,
> >                                struct platform_device *pdev)
> >  {
> > @@ -426,6 +457,14 @@ static int amd_mdb_add_pcie_port(struct
> amd_mdb_pcie *pcie,
> >
> >       pp->ops = &amd_mdb_pcie_host_ops;
> >
> > +     if (pcie->perst_gpio) {
> > +             mdelay(PCIE_T_PVPERL_MS);
> > +
> > +             /* Deassert the reset signal */
> > +             gpiod_set_value_cansleep(pcie->perst_gpio, 0);
> > +             mdelay(PCIE_T_RRS_READY_MS);
> > +     }
> > +
> >       err = dw_pcie_host_init(pp);
> >       if (err) {
> >               dev_err(dev, "Failed to initialize host, err=%d\n", err);
> > @@ -444,6 +483,7 @@ static int amd_mdb_pcie_probe(struct platform_device
> *pdev)
> >       struct device *dev = &pdev->dev;
> >       struct amd_mdb_pcie *pcie;
> >       struct dw_pcie *pci;
> > +     int ret;
> >
> >       pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
> >       if (!pcie)
> > @@ -454,6 +494,27 @@ static int amd_mdb_pcie_probe(struct platform_device
> *pdev)
> >
> >       platform_set_drvdata(pdev, pcie);
> >
> > +     ret = amd_mdb_parse_pcie_port(pcie);
> > +
> > +     /*
> > +      * If amd_mdb_parse_pcie_port returns -ENODEV, it indicates that the
> > +      * PCIe Bridge node was not found in the device tree. This is not
> > +      * considered a fatal error and will trigger a fallback where the
> > +      * reset GPIO is acquired directly from the PCIe node.
> > +      */
> > +     if (ret && ret != -ENODEV) {
> > +             return ret;
> > +     } else if (ret == -ENODEV) {
>
> The "ret" checking seems unnecessarily complicated.
>
> > +             dev_info(dev, "Falling back to acquire reset GPIO from PCIe node\n");
>
> I don't think this is worthy of a message.  If there are DTs in the
> field that were valid once, they continue to be valid forever, and
> there's no point in complaining about them.
>
> https://lore.kernel.org/all/20250702-perst-v5-2-920b3d1f6ee1@qti.qualcomm.com/
> has a good example of how to this fallback nicely.
>
> Otherwise looks good to me.
>

Thanks for the feedback. I've removed the fallback message and simplified the "ret"
checking. Could you please confirm if this looks good for v6?

        if (ret == -ENODEV) {

                /* Request the GPIO for PCIe reset signal and assert */
                pcie->perst_gpio = devm_gpiod_get_optional(dev, "reset",
                                                           GPIOD_OUT_HIGH);
                if (IS_ERR(pcie->perst_gpio))
                        return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
                                             "Failed to request reset GPIO\n");
        } else if (ret) {
                return ret;
        }

> > +
> > +             /* Request the GPIO for PCIe reset signal and assert */
> > +             pcie->perst_gpio = devm_gpiod_get_optional(dev, "reset",
> > +                                                        GPIOD_OUT_HIGH);
> > +             if (IS_ERR(pcie->perst_gpio))
> > +                     return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
> > +                                          "Failed to request reset GPIO\n");
> > +     }
> > +
> >       return amd_mdb_add_pcie_port(pcie, pdev);
> >  }
> >
> > --
> > 2.44.1
> >

Regards,
Sai Krishna

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST# signal handling
  2025-07-18  4:30     ` Musham, Sai Krishna
@ 2025-07-18 16:31       ` Bjorn Helgaas
  2025-07-19  2:59         ` Musham, Sai Krishna
  0 siblings, 1 reply; 7+ messages in thread
From: Bjorn Helgaas @ 2025-07-18 16:31 UTC (permalink / raw)
  To: Musham, Sai Krishna
  Cc: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
	mani@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, cassel@kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Simek, Michal, Gogada, Bharat Kumar, Havalige, Thippeswamy

On Fri, Jul 18, 2025 at 04:30:32AM +0000, Musham, Sai Krishna wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
> 
> Hi Bjorn,
> 
> > -----Original Message-----
> > From: Bjorn Helgaas <helgaas@kernel.org>
> > Sent: Saturday, July 12, 2025 4:49 AM
> > To: Musham, Sai Krishna <sai.krishna.musham@amd.com>
> > Cc: bhelgaas@google.com; lpieralisi@kernel.org; kw@linux.com; mani@kernel.org;
> > robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; cassel@kernel.org;
> > linux-pci@vger.kernel.org; devicetree@vger.kernel.org; linux-
> > kernel@vger.kernel.org; Simek, Michal <michal.simek@amd.com>; Gogada, Bharat
> > Kumar <bharat.kumar.gogada@amd.com>; Havalige, Thippeswamy
> > <thippeswamy.havalige@amd.com>
> > Subject: Re: [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST#
> > signal handling
> >
> > Caution: This message originated from an External Source. Use proper caution
> > when opening attachments, clicking links, or responding.
> >
> >
> > On Fri, Jul 11, 2025 at 10:53:57AM +0530, Sai Krishna Musham wrote:
> > > Add support for handling the AMD Versal Gen 2 MDB PCIe Root Port PERST#
> > > signal via a GPIO by parsing the new PCIe bridge node to acquire the
> > > reset GPIO. If the bridge node is not found, fall back to acquiring it
> > > from the PCIe node.
> > >
> > > As part of this, update the interrupt controller node parsing to use
> > > of_get_child_by_name() instead of of_get_next_child(), since the PCIe
> > > node now has multiple children. This ensures the correct node is
> > > selected during initialization.

> > > +      * If amd_mdb_parse_pcie_port returns -ENODEV, it indicates that the
> > > +      * PCIe Bridge node was not found in the device tree. This is not
> > > +      * considered a fatal error and will trigger a fallback where the
> > > +      * reset GPIO is acquired directly from the PCIe node.
> > > +      */
> > > +     if (ret && ret != -ENODEV) {
> > > +             return ret;
> > > +     } else if (ret == -ENODEV) {
> >
> > The "ret" checking seems unnecessarily complicated.
> >
> > > +             dev_info(dev, "Falling back to acquire reset GPIO from PCIe node\n");
> >
> > I don't think this is worthy of a message.  If there are DTs in the
> > field that were valid once, they continue to be valid forever, and
> > there's no point in complaining about them.
> >
> > https://lore.kernel.org/all/20250702-perst-v5-2-920b3d1f6ee1@qti.qualcomm.com/
> > has a good example of how to this fallback nicely.
> >
> > Otherwise looks good to me.
> 
> Thanks for the feedback. I've removed the fallback message and simplified the "ret"
> checking. Could you please confirm if this looks good for v6?
> 
>         if (ret == -ENODEV) {
> 
>                 /* Request the GPIO for PCIe reset signal and assert */
>                 pcie->perst_gpio = devm_gpiod_get_optional(dev, "reset",
>                                                            GPIOD_OUT_HIGH);
>                 if (IS_ERR(pcie->perst_gpio))
>                         return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
>                                              "Failed to request reset GPIO\n");
>         } else if (ret) {
>                 return ret;
>         }

Looks good to me.  It's important to note that this -ENODEV fallback
uses the PERST# GPIO described in the host bridge, not in a Root Port,
but I think your comment above includes this.

Bjorn

^ permalink raw reply	[flat|nested] 7+ messages in thread

* RE: [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST# signal handling
  2025-07-18 16:31       ` Bjorn Helgaas
@ 2025-07-19  2:59         ` Musham, Sai Krishna
  0 siblings, 0 replies; 7+ messages in thread
From: Musham, Sai Krishna @ 2025-07-19  2:59 UTC (permalink / raw)
  To: Bjorn Helgaas
  Cc: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
	mani@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, cassel@kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Simek, Michal, Gogada, Bharat Kumar, Havalige, Thippeswamy

[AMD Official Use Only - AMD Internal Distribution Only]

Hi Bjorn,

> -----Original Message-----
> From: Bjorn Helgaas <helgaas@kernel.org>
> Sent: Friday, July 18, 2025 10:02 PM
> To: Musham, Sai Krishna <sai.krishna.musham@amd.com>
> Cc: bhelgaas@google.com; lpieralisi@kernel.org; kw@linux.com; mani@kernel.org;
> robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; cassel@kernel.org;
> linux-pci@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; Simek, Michal <michal.simek@amd.com>; Gogada, Bharat
> Kumar <bharat.kumar.gogada@amd.com>; Havalige, Thippeswamy
> <thippeswamy.havalige@amd.com>
> Subject: Re: [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST#
> signal handling
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On Fri, Jul 18, 2025 at 04:30:32AM +0000, Musham, Sai Krishna wrote:
> > [AMD Official Use Only - AMD Internal Distribution Only]
> >
> > Hi Bjorn,
> >
> > > -----Original Message-----
> > > From: Bjorn Helgaas <helgaas@kernel.org>
> > > Sent: Saturday, July 12, 2025 4:49 AM
> > > To: Musham, Sai Krishna <sai.krishna.musham@amd.com>
> > > Cc: bhelgaas@google.com; lpieralisi@kernel.org; kw@linux.com;
> mani@kernel.org;
> > > robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; cassel@kernel.org;
> > > linux-pci@vger.kernel.org; devicetree@vger.kernel.org; linux-
> > > kernel@vger.kernel.org; Simek, Michal <michal.simek@amd.com>; Gogada,
> Bharat
> > > Kumar <bharat.kumar.gogada@amd.com>; Havalige, Thippeswamy
> > > <thippeswamy.havalige@amd.com>
> > > Subject: Re: [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST#
> > > signal handling
> > >
> > > Caution: This message originated from an External Source. Use proper caution
> > > when opening attachments, clicking links, or responding.
> > >
> > >
> > > On Fri, Jul 11, 2025 at 10:53:57AM +0530, Sai Krishna Musham wrote:
> > > > Add support for handling the AMD Versal Gen 2 MDB PCIe Root Port PERST#
> > > > signal via a GPIO by parsing the new PCIe bridge node to acquire the
> > > > reset GPIO. If the bridge node is not found, fall back to acquiring it
> > > > from the PCIe node.
> > > >
> > > > As part of this, update the interrupt controller node parsing to use
> > > > of_get_child_by_name() instead of of_get_next_child(), since the PCIe
> > > > node now has multiple children. This ensures the correct node is
> > > > selected during initialization.
>
> > > > +      * If amd_mdb_parse_pcie_port returns -ENODEV, it indicates that the
> > > > +      * PCIe Bridge node was not found in the device tree. This is not
> > > > +      * considered a fatal error and will trigger a fallback where the
> > > > +      * reset GPIO is acquired directly from the PCIe node.
> > > > +      */
> > > > +     if (ret && ret != -ENODEV) {
> > > > +             return ret;
> > > > +     } else if (ret == -ENODEV) {
> > >
> > > The "ret" checking seems unnecessarily complicated.
> > >
> > > > +             dev_info(dev, "Falling back to acquire reset GPIO from PCIe
> node\n");
> > >
> > > I don't think this is worthy of a message.  If there are DTs in the
> > > field that were valid once, they continue to be valid forever, and
> > > there's no point in complaining about them.
> > >
> > > https://lore.kernel.org/all/20250702-perst-v5-2-
> 920b3d1f6ee1@qti.qualcomm.com/
> > > has a good example of how to this fallback nicely.
> > >
> > > Otherwise looks good to me.
> >
> > Thanks for the feedback. I've removed the fallback message and simplified the
> "ret"
> > checking. Could you please confirm if this looks good for v6?
> >
> >         if (ret == -ENODEV) {
> >
> >                 /* Request the GPIO for PCIe reset signal and assert */
> >                 pcie->perst_gpio = devm_gpiod_get_optional(dev, "reset",
> >                                                            GPIOD_OUT_HIGH);
> >                 if (IS_ERR(pcie->perst_gpio))
> >                         return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
> >                                              "Failed to request reset GPIO\n");
> >         } else if (ret) {
> >                 return ret;
> >         }
>
> Looks good to me.  It's important to note that this -ENODEV fallback
> uses the PERST# GPIO described in the host bridge, not in a Root Port,
> but I think your comment above includes this.
>

Thanks for the confirmation. Yes, you're correct - the fallback uses the
PERST# GPIO described in the host bridge.

I will submit v6 with the simplified error handling.

> Bjorn

Regards,
Sai Krishna

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2025-07-19  2:59 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-07-11  5:23 [PATCH v5 0/2] Add support for AMD Versal Gen 2 MDB PCIe RP PERST# Sai Krishna Musham
2025-07-11  5:23 ` [PATCH v5 1/2] dt-bindings: PCI: amd-mdb: Add example usage of reset-gpios for " Sai Krishna Musham
2025-07-11  5:23 ` [PATCH v5 2/2] PCI: amd-mdb: Add support for PCIe RP PERST# signal handling Sai Krishna Musham
2025-07-11 23:18   ` Bjorn Helgaas
2025-07-18  4:30     ` Musham, Sai Krishna
2025-07-18 16:31       ` Bjorn Helgaas
2025-07-19  2:59         ` Musham, Sai Krishna

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