* [PATCH] dt-bindings: gpio: Convert st,spear-spics-gpio to DT schema
@ 2025-07-14 20:27 Rob Herring (Arm)
2025-07-15 2:59 ` Viresh Kumar
2025-07-18 7:55 ` Bartosz Golaszewski
0 siblings, 2 replies; 3+ messages in thread
From: Rob Herring (Arm) @ 2025-07-14 20:27 UTC (permalink / raw)
To: Linus Walleij, Bartosz Golaszewski, Krzysztof Kozlowski,
Conor Dooley, Viresh Kumar
Cc: linux-gpio, devicetree, linux-kernel
Convert the ST SPEAr SPI CS GPIO binding to DT schema format. It's a
straight forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
.../devicetree/bindings/gpio/spear_spics.txt | 49 -----------
.../bindings/gpio/st,spear-spics-gpio.yaml | 82 +++++++++++++++++++
2 files changed, 82 insertions(+), 49 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/gpio/spear_spics.txt
create mode 100644 Documentation/devicetree/bindings/gpio/st,spear-spics-gpio.yaml
diff --git a/Documentation/devicetree/bindings/gpio/spear_spics.txt b/Documentation/devicetree/bindings/gpio/spear_spics.txt
deleted file mode 100644
index dd04d96e6ff1..000000000000
--- a/Documentation/devicetree/bindings/gpio/spear_spics.txt
+++ /dev/null
@@ -1,49 +0,0 @@
-=== ST Microelectronics SPEAr SPI CS Driver ===
-
-SPEAr platform provides a provision to control chipselects of ARM PL022 Prime
-Cell spi controller through its system registers, which otherwise remains under
-PL022 control. If chipselect remain under PL022 control then they would be
-released as soon as transfer is over and TxFIFO becomes empty. This is not
-desired by some of the device protocols above spi which expect (multiple)
-transfers without releasing their chipselects.
-
-Chipselects can be controlled by software by turning them as GPIOs. SPEAr
-provides another interface through system registers through which software can
-directly control each PL022 chipselect. Hence, it is natural for SPEAr to export
-the control of this interface as gpio.
-
-Required properties:
-
- * compatible: should be defined as "st,spear-spics-gpio"
- * reg: mentioning address range of spics controller
- * st-spics,peripcfg-reg: peripheral configuration register offset
- * st-spics,sw-enable-bit: bit offset to enable sw control
- * st-spics,cs-value-bit: bit offset to drive chipselect low or high
- * st-spics,cs-enable-mask: chip select number bit mask
- * st-spics,cs-enable-shift: chip select number program offset
- * gpio-controller: Marks the device node as gpio controller
- * #gpio-cells: should be 1 and will mention chip select number
-
-All the above bit offsets are within peripcfg register.
-
-Example:
--------
-spics: spics@e0700000{
- compatible = "st,spear-spics-gpio";
- reg = <0xe0700000 0x1000>;
- st-spics,peripcfg-reg = <0x3b0>;
- st-spics,sw-enable-bit = <12>;
- st-spics,cs-value-bit = <11>;
- st-spics,cs-enable-mask = <3>;
- st-spics,cs-enable-shift = <8>;
- gpio-controller;
- #gpio-cells = <2>;
-};
-
-
-spi0: spi@e0100000 {
- num-cs = <3>;
- cs-gpios = <&gpio1 7 0>, <&spics 0>,
- <&spics 1>;
- ...
-}
diff --git a/Documentation/devicetree/bindings/gpio/st,spear-spics-gpio.yaml b/Documentation/devicetree/bindings/gpio/st,spear-spics-gpio.yaml
new file mode 100644
index 000000000000..3b0d2112da79
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/st,spear-spics-gpio.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/st,spear-spics-gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ST Microelectronics SPEAr SPI CS GPIO Controller
+
+maintainers:
+ - Viresh Kumar <vireshk@kernel.org>
+
+description: >
+ SPEAr platform provides a provision to control chipselects of ARM PL022 Prime
+ Cell spi controller through its system registers, which otherwise remains
+ under PL022 control. If chipselect remain under PL022 control then they would
+ be released as soon as transfer is over and TxFIFO becomes empty. This is not
+ desired by some of the device protocols above spi which expect (multiple)
+ transfers without releasing their chipselects.
+
+ Chipselects can be controlled by software by turning them as GPIOs. SPEAr
+ provides another interface through system registers through which software can
+ directly control each PL022 chipselect. Hence, it is natural for SPEAr to
+ export the control of this interface as gpio.
+
+properties:
+ compatible:
+ const: st,spear-spics-gpio
+
+ reg:
+ maxItems: 1
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+
+ st-spics,peripcfg-reg:
+ description: Offset of the peripcfg register.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ st-spics,sw-enable-bit:
+ description: Bit offset to enable software chipselect control.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ st-spics,cs-value-bit:
+ description: Bit offset to drive chipselect low or high.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ st-spics,cs-enable-mask:
+ description: Bitmask selecting which chipselects to enable.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ st-spics,cs-enable-shift:
+ description: Bit shift for programming chipselect number.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+required:
+ - compatible
+ - reg
+ - gpio-controller
+ - '#gpio-cells'
+ - st-spics,peripcfg-reg
+ - st-spics,sw-enable-bit
+ - st-spics,cs-value-bit
+ - st-spics,cs-enable-mask
+ - st-spics,cs-enable-shift
+
+additionalProperties: false
+
+examples:
+ - |
+ gpio@e0700000 {
+ compatible = "st,spear-spics-gpio";
+ reg = <0xe0700000 0x1000>;
+ st-spics,peripcfg-reg = <0x3b0>;
+ st-spics,sw-enable-bit = <12>;
+ st-spics,cs-value-bit = <11>;
+ st-spics,cs-enable-mask = <3>;
+ st-spics,cs-enable-shift = <8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
--
2.47.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: gpio: Convert st,spear-spics-gpio to DT schema
2025-07-14 20:27 [PATCH] dt-bindings: gpio: Convert st,spear-spics-gpio to DT schema Rob Herring (Arm)
@ 2025-07-15 2:59 ` Viresh Kumar
2025-07-18 7:55 ` Bartosz Golaszewski
1 sibling, 0 replies; 3+ messages in thread
From: Viresh Kumar @ 2025-07-15 2:59 UTC (permalink / raw)
To: Rob Herring (Arm)
Cc: Linus Walleij, Bartosz Golaszewski, Krzysztof Kozlowski,
Conor Dooley, Viresh Kumar, linux-gpio, devicetree, linux-kernel
On 14-07-25, 15:27, Rob Herring (Arm) wrote:
> Convert the ST SPEAr SPI CS GPIO binding to DT schema format. It's a
> straight forward conversion.
>
> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] dt-bindings: gpio: Convert st,spear-spics-gpio to DT schema
2025-07-14 20:27 [PATCH] dt-bindings: gpio: Convert st,spear-spics-gpio to DT schema Rob Herring (Arm)
2025-07-15 2:59 ` Viresh Kumar
@ 2025-07-18 7:55 ` Bartosz Golaszewski
1 sibling, 0 replies; 3+ messages in thread
From: Bartosz Golaszewski @ 2025-07-18 7:55 UTC (permalink / raw)
To: Linus Walleij, Bartosz Golaszewski, Krzysztof Kozlowski,
Conor Dooley, Viresh Kumar, Rob Herring (Arm)
Cc: Bartosz Golaszewski, linux-gpio, devicetree, linux-kernel
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
On Mon, 14 Jul 2025 15:27:52 -0500, Rob Herring (Arm) wrote:
> Convert the ST SPEAr SPI CS GPIO binding to DT schema format. It's a
> straight forward conversion.
>
>
Applied, thanks!
[1/1] dt-bindings: gpio: Convert st,spear-spics-gpio to DT schema
https://git.kernel.org/brgl/linux/c/3a315c97fcfac3785060c1980d0a81ce76a24cc7
Best regards,
--
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2025-07-15 2:59 ` Viresh Kumar
2025-07-18 7:55 ` Bartosz Golaszewski
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