[PATCH 1/2] dt-bindings: crypto: inside-secure,safexcel: make eip/mem IRQ optional

[PATCH 1/2] dt-bindings: crypto: inside-secure,safexcel: make eip/mem IRQ optional

[Aleksander Jan Bajkowski]

Binding for this cryptographic engine defined 6 interrupts since its
beginning. It seems however only 4 rings IRQs are really required for
operating this hardware. Linux driver doesn't use "eip" or "mem" IRQs
and it isn't clear if they are always available (MT7986 devicetree
doesn't specify them).

The hardware reference manual [1] for the EIP-197 IP core only defines
ring interrupts and a global interrupt ("eip"). Ring interrupts can
optionaly be routed via the main interrupt. Role of the "mem" interrupt
is unknown.

This deals with:
arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtb: crypto@10320000: interrupts: [[0, 116, 4], [0, 117, 4], [0, 118, 4], [0, 119, 4]] is too short
        from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtb: crypto@10320000: interrupt-names: ['ring0', 'ring1', 'ring2', 'ring3'] is too short
        from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#

[1] https://www.scribd.com/document/665924595/Security-IP-197-HW3-4-Hardware-Reference-Manual-RevA
Cc: Antoine Tenart <atenart@kernel.org>
Cc: Sam Shih <sam.shih@mediatek.com>
CC: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
 .../crypto/inside-secure,safexcel.yaml        | 21 ++++++++++++-------
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml
index 343e2d04c797..97af96bfe5f6 100644
--- a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml
+++ b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml
@@ -26,16 +26,23 @@ properties:
     maxItems: 1
 
   interrupts:
+    minItems: 4
     maxItems: 6
 
   interrupt-names:
-    items:
-      - const: ring0
-      - const: ring1
-      - const: ring2
-      - const: ring3
-      - const: eip
-      - const: mem
+    oneOf:
+      - items:
+          - const: ring0
+          - const: ring1
+          - const: ring2
+          - const: ring3
+          - const: eip
+          - const: mem
+      - items:
+          - const: ring0
+          - const: ring1
+          - const: ring2
+          - const: ring3
 
   clocks:
     minItems: 1
-- 
2.39.5

[PATCH 2/2] arm64: dts: mediatek: add crypto offload support on MT7981

[Aleksander Jan Bajkowski]

The MT7981 as well as the MT7986 have a built-in EIP-97 crypto accelerator.
This commit adds the missing entry in the dts.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
 arch/arm64/boot/dts/mediatek/mt7981b.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
index 5cbea9cd411f..ebab8dde1e70 100644
--- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
@@ -94,6 +94,20 @@ pwm@10048000 {
 			#pwm-cells = <2>;
 		};
 
+		crypto@10320000 {
+			compatible = "inside-secure,safexcel-eip97";
+			reg = <0 0x10320000 0 0x40000>;
+			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "ring0", "ring1", "ring2", "ring3";
+			clocks = <&topckgen CLK_TOP_EIP97B>;
+			clock-names = "core";
+			assigned-clocks = <&topckgen CLK_TOP_EIP97B_SEL>;
+			assigned-clock-parents = <&topckgen CLK_TOP_CB_NET1_D5>;
+		};
+
 		serial@11002000 {
 			compatible = "mediatek,mt7981-uart", "mediatek,mt6577-uart";
 			reg = <0 0x11002000 0 0x100>;
-- 
2.39.5

Re: [PATCH 1/2] dt-bindings: crypto: inside-secure,safexcel: make eip/mem IRQ optional

[Krzysztof Kozlowski]

On Sun, Jul 20, 2025 at 07:49:02PM +0200, Aleksander Jan Bajkowski wrote:
> Binding for this cryptographic engine defined 6 interrupts since its
> beginning. It seems however only 4 rings IRQs are really required for
> operating this hardware. Linux driver doesn't use "eip" or "mem" IRQs

Are the lines there in hardware or not? See writing bindings - they
exactly cover this case.

> and it isn't clear if they are always available (MT7986 devicetree
> doesn't specify them).

You need SoC specific compatibles which will narrow this per variant of
the block.

> 
> The hardware reference manual [1] for the EIP-197 IP core only defines
> ring interrupts and a global interrupt ("eip"). Ring interrupts can
> optionaly be routed via the main interrupt. Role of the "mem" interrupt
> is unknown.
> 
> This deals with:
> arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtb: crypto@10320000: interrupts: [[0, 116, 4], [0, 117, 4], [0, 118, 4], [0, 119, 4]] is too short
>         from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
> arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dtb: crypto@10320000: interrupt-names: ['ring0', 'ring1', 'ring2', 'ring3'] is too short
>         from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
> 
> [1] https://www.scribd.com/document/665924595/Security-IP-197-HW3-4-Hardware-Reference-Manual-RevA
> Cc: Antoine Tenart <atenart@kernel.org>
> Cc: Sam Shih <sam.shih@mediatek.com>
> CC: Rafał Miłecki <rafal@milecki.pl>
> Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
> ---
>  .../crypto/inside-secure,safexcel.yaml        | 21 ++++++++++++-------
>  1 file changed, 14 insertions(+), 7 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml
> index 343e2d04c797..97af96bfe5f6 100644
> --- a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml
> +++ b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml
> @@ -26,16 +26,23 @@ properties:
>      maxItems: 1
>  
>    interrupts:
> +    minItems: 4
>      maxItems: 6
>  
>    interrupt-names:
> -    items:
> -      - const: ring0
> -      - const: ring1
> -      - const: ring2
> -      - const: ring3
> -      - const: eip
> -      - const: mem

You just miss minItems: 4 and no need for all the rest.

Best regards,
Krzysztof

Re: [PATCH 2/2] arm64: dts: mediatek: add crypto offload support on MT7981

[Krzysztof Kozlowski]

On Sun, Jul 20, 2025 at 07:49:03PM +0200, Aleksander Jan Bajkowski wrote:
> The MT7981 as well as the MT7986 have a built-in EIP-97 crypto accelerator.
> This commit adds the missing entry in the dts.
> 
> Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
> ---
>  arch/arm64/boot/dts/mediatek/mt7981b.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
> index 5cbea9cd411f..ebab8dde1e70 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi
> @@ -94,6 +94,20 @@ pwm@10048000 {
>  			#pwm-cells = <2>;
>  		};
>  
> +		crypto@10320000 {
> +			compatible = "inside-secure,safexcel-eip97";

Missing SoC compatible. You should not use IP block compatibles alone
and your previous patch explains why: some wires can be connected
differently.

Best regards,
Krzysztof